EEC118 - Digital Integrated Circuits
UC Davis
Dept. of Electrical and Computer Engineering

Prof. Rajeevan Amirtharajah

3173 Kemper Hall

E-mail:    ramirtha@ece.ucdavis.edu

Office Hours: Wednesday 2 PM - 3 PM or by appointment.

Travis Kleeburg

E-mail:    tjkleeburg@ucdavis.edu

Office hours: Wednesdays, 4-5 PM in Kemper 2161

Erin Fong

E-mail:    egfong@ucdavis.edu

Office hours: Thursdays, 3-4 PM in Kemper 2161

Lecture:

Mon/Wed 8:30 am - 10:00 am in Haring 2016

Textbook:

Digital Integrated Circuits: A Design Perspective

J. Rabaey, A. Chandrakasan, and B. Nikolic

2nd edition

Web Page

References:

CMOS Digital Integrated Circuits: Analysis and Design

S-M. Kang and Y. Leblebici

3rd edition

CMOS VLSI Design - A Circuits and Systems Perspective

N. H. Weste and D. Harris

3rd edition

Midterm: Mon 5/2/11 in class.

Closed book, closed notes. Calculators are allowed.

Final: Monday June 6th, 8:00 AM to 10:00 AM, in normal lecture room (Haring 2016)

Course web page:   http://www.ece.ucdavis.edu/~ramirtha/EEC118/S11/S11.html

The web page can also be accessed from the EEC 118 SmartSite.

Email. Please use email to contact me or the TA for your lab section only, for urgent or personal matters that cannot be handled through office hours, in-class questions, or immediately after class.

Grading

• 15%   Labs
• 15%   Design Project
• 5%   Weekly Homework
• 10%   Quizzes
• 20%   Midterm (Monday, May 2, in class)
• 35%   Final (Monday, June 6, 8:00 AM-10:00 AM)

Course Policies

Homework

All work must be done individually. On each homework, write your name, lab section number, and problem set number clearly at the top.

All homeworks are due Friday at 4:00 PM in Room 2131 and will be returned in your lab section after grading. Unfortunately, late homeworks cannot be accepted except for verifiable medical excuses approved by the instructor.

Each homework problem will be graded on a three-point scale: 0 (not a full effort), 1 (close but fundamental problem), and 2 (correct).

Quizzes, Midterm, and Final exam

Four announced quizzes will be given throughout the quarter. They are designed such that students that do required readings and listen in lecture will earn very high scores. Students that do not do required readings and do not listen in lecture will likely receive much lower scores. Quizzes are closed book and closed notes, although a calculator is allowed. They are designed to be completed in about 10 minutes. The lowest of the four scores will be dropped.

The midterm and final exam are mandatory components of this course. Unfortunately, no early or late exams are possible. If an unavoidable emergency prevents your attendance at the midterm or final, you will be required to submit written proof of the emergency and the make-up exam will likely be given as an oral exam with the instructor.

Course Schedule

Date	Reading	Lecture	Slides	Notes
Mon, March 28	Rabaey 1, 2, 3 (Kang 1, 2, 3)	Course Introduction MOS Fabrication MOSFET Overview	pdf
Wed, March 30	Rabaey 3.1-3.4 (Kang 3.1-3.4)	MOS Structure and Basic Operation	pdf
Mon, April 4	Rabaey 3.3-3.5 (Kang 3.5-3.6, 5.1-5.3)	MOSFET Scaling and Capacitances Inverters	pdf
Wed, April 6	Rabaey 5.1-5.5 (Kang 5.1-5.3, 6.1-6.4)	Inverters CMOS Inverters Inverter Transient Characteristics	pdf  pdf
Mon, April 11	Rabaey 6.1-6.2, 7.1-7.3 (Kang 7.3-7.4, 8.1-8.3)	Combinational MOS Logic CMOS Logic Transient Characteristics	pdf	Quiz 1 (sol)
Wed, April 13	Rabaey 7.1-7.3 (Kang 8.4-8.5)	Sequential MOS Logic	pdf
Mon, April 18	Rabaey 7.1-7.3 (Kang 8.4-8.5)	Sequential MOS Logic
Wed, April 20		Logical Effort	ppt  pdf
Mon, April 25		Logical Effort		Quiz 2 (sol)
Wed, April 27	Rabaey 6.3 (Kang 9.4-9.6)	Alternative Static Logic Families	pdf
Mon, May 2	-	Midterm	Solution (pdf) Midterm Results (pdf)	EEC 118 Spring 2009 Midterm EEC 118 Spring 2009 Midterm Solutions
Wed, May 4	Rabaey 6.2-6.3 (Kang 9.1-9.2)	Dynamic Logic Circuits	pdf
Mon, May 9	Rabaey 11	Arithmetic Circuits	pdf
Wed, May 11	Rabaey 11	Arithmetic Circuits
Mon, May 16	Rabaey 11 Rabaey 12.1-12.2 (Kang 10.1-10.2)	Arithmetic Circuits Memories	pdf
Wed, May 18	Rabaey 12.1-12.2 (Kang 10.3-10.5)	Memories		Quiz 3 (sol)
Mon, May 23	Rabaey 5.5 (Kang 6.7, 11)	Memories Low Power CMOS Logic Circuits	pdf
Wed, May 25	Rabaey 4, 9 (Kang 6.5-6.6)	Interconnect	pdf	Quiz 4 (sol)
Mon, May 31		Memorial Day Holiday
Wed, June 1	Rabaey G, H (Kang 14)	Design for Manufacturability Alternative Logic Technologies Final Review	pdf  pdf
Mon, June 6	-	Final	Solution (pdf)	EEC 118 Spring 2009 Final EEC 118 Spring 2009 Final Solutions

Assignments

5/31/11 - Added Lectures 16 and 17 and several other handouts and solutions
5/09/11 - Added Lecture 10 and Arithmetic lecture
4/26/11 - Added Lecture 9 and several handouts and solutions
4/17/11 - Added HW4 and Lecture 8
4/12/11 - Added Lecture 7
4/09/11 - Added Lecture 6
4/09/11 - Added Lab 3, HW3, and HW1 and HW2 solutions
4/04/11 - Added Lectures 3, 4 and 5
4/03/11 - Added HW2
3/28/11 - Updated Lectures 1 and 2
3/26/11 - Created

Last modified 5/31/11