EEC 280: Handouts*,**

*not to be reproduced without a written permission from the author

**If you can not open and run a file on this page, try downloading it from the protected directory (you need to use your UID and password).

Lecture 1: Historical Overview, Technology Roadmap (Week 1)

  1. Lecture 1: Historical Introduction (pdf file),
  2. Chapter 1: Historical Introduction (pdf file)

Overview of Technology (Roadmap):

  1. Gordon Moore (pdf file)
  2. Gelsinger DAC Keynote (ppt file)

Lecture 2: Introduction, review of Basic CMOS  (Week 2)

  1. Lecture 2: Introduction of the CMOS basic (pps file)
  2. Chapter 2: Basic CMOS (pdf file)

Of General Interest:

  1. S. Borkar (Intel): Distinguished Lecture, UC Berkeley, October 13, 2004.

Lecture 3: Logical Effort, Transistor sizing for performance (Week 3: October 10,12)

  1. Lecture3: Logical Effort - Introduction (pps file)
  2. Chapter 3: CMOS Speed: Method of "Logical Effort" - Part 1 (pdf file)
  3. Logical Effort (Harris presentation) (pdf file)
  4. Logical Effort (Prof. Horowitz lecture) (pdf file)

Readings:

  1. Logical Efforts original-paper (pdf file)
  2. UC Davis student Bart Zeydel comments on logical effort coverage in Rabaey's book (pdf file)
  3. Branching analysis of paths with the same number of stages (pdf file)

Lecture 4: Dynamic Logic, CMOS DOMINO, DCVS (Week 4: October 17,19)

  1. Lecture 4: Dynamic and CMOS Domino Logic (pps file)
  2. Chapter 4a: Dynamic and Domino Logic (pdf file)

Lecture 5 (Week 5: October 24,26)

  1. Lecture 5: Pass-Transistor Logic (pps file)
  2. Chapter 4b: Pass-Transistor Logic (pdf file)
  3. Lecture 5b: Application of Logical Effort: Adders (pps file)

Lecture 6 (Week 6: October 31, November 2 )

  1. Advanced Gate Characterization
  2. Low-Power Design Techniques in Digital Systems
  3. Ultra-Low Power Design Techniques

SPICE Issue:

  1. DC Initialization issue with Berkeley's 65-nm model (pdf file)

Handouts, of general interest:

  1. Int'l Symposium on Low-Power Electronics: Tutorials and Keynotes

Lecture 7 (Week 7: November 7, 9)

  1. Advanced Topics on Logical Effort

Lecture 8 (Week 8: November 14,16)

  1. Chpt. 7 Introduction to digital system clocking (doc file)
  2. Digital system clocking(1) (ppt file)
  3. Chpt. 8 Clocked Storage Elements Operation (doc file)
  4. Digital system clocking(2) (ppt file)

Lecture 9 (Week 9: November 21, 23)

  1. Midterm (Nov.)

Lecture 10 (Week 10 November 28, 30)

  1. VLSI Arithmetic: Data-Path
  2. VLSI Arithmetic: Multiplier

Lecture 10 (Week 11 December 5,7)

  1. Energy-Delay relationship in digital circuits
  2. Review of the Class: research topics, future directions

 

*not to be reproduced without a written permission from the author