Bevan Baas

[Bevan Baas]
Associate Professor
VLSI Computation Lab
Department of Electrical & Computer Engineering
University of California, Davis


Office
2037 Kemper Hall
ECE Department
University of California
Davis, California   95616-5294   USA
[department web page]

Email
Phone
530-754-4834
530-752-8428 (fax)

Teaching
Quarter Course
  Winter 2009   EEC 281   VLSI Digital Signal Processing
  Spring 2009   EEC 116   VLSI Design Final Project winners and results
    EEC 180A   Digital Systems I

Office hours
TBD for Spring quarter
Also 10:30am after each lecture in or outside 1006 Giedt Hall, and
    4:30pm in or outside 1130 Bainer.

A Brief Bio
Bevan Baas received a B.S. in electronic engineering from California Polytechnic State University, San Luis Obispo in 1987, and M.S. and Ph.D. degrees in electrical engineering from Stanford University in 1990 and 1999 respectively.

From 1987-89, he served as a new product engineer working on the processor for a high-end minicomputer in Hewlett Packard's Computer Systems Division, Cupertino, CA. In 1999, he joined Atheros Communications as the second full-time employee after the founders and served as a core member of the team which developed the first IEEE 802.11a (54 Mbps, 5 GHz) Wi-Fi wireless LAN solution. The chipset has been shipping in volume since September of 2001 and for one and a half years was the only shipping 802.11a chipset [ISSCC 2002]. Atheros became a publicly-held company in Feb. of 2004 (NASDAQ:ATHR), and as of Feb 2007 had shipped more than 100 million wireless LAN chipsets.

In 2003, Dr. Baas joined the Department of Electrical and Computer Engineering at the University of California, Davis as an Assistant Professor, where he currently supervises research for 11 graduate students. In 2008, he became an Associate Professor.

Dr. Baas' research interests are in the algorithms, architectures, circuits, and VLSI design for high-performance, energy-efficient, and area-efficient computation with strong consideration of the challenges and opportunities of future fabrication technologies. He is interested in both programmable and special-purpose processors with an emphasis on DSP workloads. Recent projects include the AsAP (Asynchronous Array of simple Processors) programmable array processor chip, applications, and tools [ISSCC 2006]; Low Density Parity Check (LDPC) decoders; FFT processors; viterbi decoders; and H.264 video codecs. The 0.18 μm AsAP 1 chip contains 36 programmable processors, operates at over 610 MHz at 2.0 V, and is believed to be the second highest clock rate processor designed in any university. The VCL group recently completed the design and fabrication of a second generation processing platform with 167 1.2 GHz processors in 65 nm CMOS [VLSI Symp 2008] which is the highest clock rate processor designed in any university. The chip contains 164 programmable processors that can each independently control their supply voltage and clock frequency; three highly-configurable special-purpose processors: Fast Fourier transform (FFT), H.264 video motion estimation, and Viterbi decoder; and three 1.3 GHz 16 KB shared memories.

Dr. Baas was an NSF Fellow from 1990-93 and a NASA Graduate Student Researcher Fellow from 1993-96. He received the National Science Foundation CAREER award in 2006, and the Most Promising Engineer/Scientist Award by AISES in 2006. During the summer of 2006 he was a Visiting Professor in Intel's Circuit Research Lab. Since 2007 he has been an Associate Editor for the IEEE Journal of Solid-State Circuits. He has served as a member of the Technical Program Committee of the International Conference on Computer Design (ICCD) in 2004, 2005, 2007, and 2008; and a session chair in 2005; and as a member of the Program Committee of the IEEE HotChips Symposium on High-Performance Chips in 2009. He also serves as a member of the Technical Advisory Board of an early stage technology company. He is a member of Tau Beta Pi, Phi Kappa Phi, Eta Kappa Nu, AISES, and the IEEE.

A slightly longer bio


Research & Students

VLSI Computation Lab (VCL) home page

Research opening
I currently have an opening for a Ph.D. student with an outstanding academic record. Strong grades are a requirement. A completed MS, research experience, and publications are big pluses. Domestic US status is another big plus. Please contact me if you qualify and are interested.   A few student project examples.   A note to interested prospective students.

Research Interests


My Calendar, regularly-scheduled meetings

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Misc Items

Other Work

VLSI & Sig. Processing conferences, MIT Comp Arch list


Recent and Upcoming Presentations


Last update: April 15, 2009
Keywords:B. Baas, B. M. Baas, Beven, Bevin, Bass