![[Bevan Baas]](http://www.ece.ucdavis.edu/~bbaas/pics/PicMe_2003.01.27.jpg)
| Quarter | Course | ||
| Winter 2012 | EEC 281 | VLSI Digital Signal Processing | |
| Fall 2011 | - | Sabbatical | |
| Spring 2011 | ENG 6 | Engineering Problem Solving | |
| Winter 2011 | EEC 281 | VLSI Digital Signal Processing | |
| Fall 2010 | EEC 116 | VLSI Design | Final Project winners and results |
From 1987-89, he served as a new product engineer working on the processor for a high-end minicomputer in Hewlett Packard's Computer Systems Division, Cupertino, CA. In 1999, he joined Atheros Communications as the second full-time employee after the founders and served as a core member of the team which developed the first IEEE 802.11a (54 Mbps, 5 GHz) Wi-Fi wireless LAN solution. The chipset has been shipping in volume since September of 2001 and for one and a half years was the only shipping 802.11a chipset [ISSCC 2002]. Atheros became a publicly-held company in Feb. of 2004 and was purchased by Qualcomm in 2011.
In 2003, Dr. Baas joined the Department of Electrical and Computer Engineering at the University of California, Davis as an Assistant Professor, where he currently supervises research for 13 graduate students. In 2008, he became an Associate Professor.
Dr. Baas' research interests are in the algorithms, architectures,
circuits, and VLSI design for high-performance, energy-efficient, and
area-efficient computation with strong consideration of the challenges
and opportunities of future fabrication technologies. He is interested
in both programmable and special-purpose processors with an emphasis on
DSP workloads.
Recent projects include the
AsAP
(Asynchronous Array of simple Processors) programmable array processor
chip, applications, and
tools [ISSCC 2006];
Low Density Parity Check (LDPC) decoders; FFT processors; viterbi decoders;
and H.264 video codecs.
The 0.18 μm AsAP 1 chip contains 36 programmable processors,
operates at over 610 MHz at 2.0 V, and is believed to be the
second highest clock rate processor designed in any university.
His research group recently completed the design and fabrication of a second
generation processing platform with 167 1.2 GHz processors in 65 nm
CMOS [VLSI Symp 2008] which is believed to be the highest clock rate
processor designed in any university. The chip contains 164 programmable
processors that can each independently control their supply voltage and
clock frequency; three highly-configurable special-purpose processors:
Fast Fourier transform (FFT), H.264 video motion estimation, and Viterbi
decoder; and three 1.3 GHz 16 KB shared memories.
Dr. Baas was an NSF Fellow from 1990-93 and a NASA Graduate Student Researcher Fellow from 1993-96. He received the National Science Foundation CAREER award in 2006, the Best Paper Award at the IEEE International Conference on Computer Design in 2011, and the Most Promising Engineer/Scientist Award by AISES in 2006. During the summer of 2006 he was a Visiting Professor in Intel's Circuit Research Lab. Since 2007 he has been an Associate Editor for the IEEE Journal of Solid-State Circuits. He has served and is serving as: Program Committee Co-Chair of the IEEE HotChips Symposium on High-Performance Chips in 2011 and Program Committee member in 2009-10; Parallel Architecture Co-Chair of the 2011 Design Automation Conference (DAC) Workshop on Parallel Algorithms, Programming, and Architectures; Technical Program Committee member of the International Conference on Computer Design (ICCD) in 2004-05, 2007-09; Technical Program Committee member of the IEEE International Symposium on Asynchronous Circuits and Systems in 2010; International Solid-State Circuits Conference (ISSCC) Student Research Preview Committee member in 2012; Guest Editor of the March 2012 IEEE Micro Special Issue; and the Technical Advisory Board of an early stage technology company. He is a member of Tau Beta Pi, Phi Kappa Phi, Eta Kappa Nu, AISES, and a Senior Member of the IEEE.
A short bio, and a slightly longer bio which is not kept up to date.
VLSI Computation Lab
(VCL) home page
Research Interests
