HW Trojan Detection: Hardware Trojan is A deliberate and malicious change to an IC to add or remove functionality, leak information, or reduces reliability. At gate lab, we are investigating means of detecting hardware Trojan based on side-channel delay and power analysis

Counterfeit and Aged IC Detection: The use of counterfeit or aged and repacked ICs poses a threat to the security and reliability of target applications. Recycled ICs, ICs that have been already used but are pretended to be new, have contributed to more than 80% of the counterfeit ICs in recent years, posing around $169 billion in revenue loss to the global electronics supply chain. At GATE lab, we are investigating means of detecting counterfeit and aged ICs based on low-cost and learning-assisted testing solutions.

Logic Locking: Logic locking (a.k.a obfuscation) is a logic design solution for modifying and hiding the hardware functionality. Logic locking protects the IP embedded in an ASIC hardware design in the supply chain and makes it significantly more difficult to reverse-engineer. Active logic locking solutions make the functionality of netlist dependent on a key that is loaded into netlist after fabrication, reducing the netlist's functionality to the targeted functionality.

Malware Detection: Malware is a piece of software designed by an adversary to harm the host operating system, steal sensitive data from users, or gathers user information without permission. Malware detection is the process of determining if a piece of software is acting maliciously. At the GATE lab, we are studying means of detecting malware using learning-assisted monitoring and anomaly detection solutions by monitoring the use of hardware resources.

Resilience Analysis Through Attack Development: Logic locking solutions are used to protect the IP against reverser engineering. But, logic locking solutions are not equally strong. Logic locking solutions are assessed based on their resistance against known attacks. At GATE lab, we are investigating different means of formulating attacks against logic obfuscation solutions. We publish our crafted attacks and publically release and share the attack software with the research community. Our goal is to provide researchers with the assessment tool that they need in their arsenal to evaluate their logic-locking solutions and differentiate between weak and robust solutions.

Secure Key Management: Hardware stores many secrets and keys. The secure management and storage of key values are essential for building trust in hardware and, in turn, in the overall computing system. At GATE lab, we are investigating means of secure storage and management of key and secret values in the hardware.

Secure Design For Test (DFT) Solutions: Design for test solutions provides hardware designers with means of testing the IC functionality after fabrication. However, DFT structures could also be used for the extraction of key and secret values. At GATE lab, we investigate means of building secure DFT solutions, allowing the IC to be securely tested without leaking sensitive information.

Energy Efficient Machine Learning: The Deep Learning Model's prediction accuracy credited many scholars' hard work in machine learning, and backed by the rising processing power provided by Graphical Processing Units (GPU) for training these complex models, has improved significantly. However, these deep learning solutions are computationally intensive. Adopting complex learning solutions in many mobile and hand-held, embedded systems and IoT applications will not be feasible without lowering the energy consumption barrier. Simultaneously, many of the desired applications require real-time and short-latency responses, highlighting the need for fast learning solutions. In search of solutions for managing the energy problem of learning models, In the GATE lab, we investigate solutions for transforming the complex learning models into simpler energy-efficient models with no or negligible loss of accuracy and deadline-aware learning models capable of producing best-effort classification before a given deadline.

Security of Learning Models & Adversarial resiliency: The ability to maliciously perturb any input to a deep learning model and cause a misclassification with high confidence belies a lack of security and credibility to what the models have learned. In the GATE lab, We are working on methods for making learning models robust against adversarial attacks.

Applied Learning in Digital and Physical Design: Many of the algorithms used for Digital and physical design are heuristic algorithms developed based on expert intuition of tradeoffs in digital or physical design space and best practice solutions investigated or applied in the past. Machine learning provides us with an alternative and powerful tool to replace many of these heuristic algorithms and discover complex relationships and tradeoffs that are not explored or understood by state-of-the-art digital design and physical design EDA solutions. In the GATE lab, we are exploring applied learning solutions that could assist us with optimization of digital and physical designs.