Sasan professor & laboratory responsive template

[J13] Kimia Zamiri Azar, Hadi Mardani Kamali, Houman Homayoun, Avesta Sasan,

Data Flow Obfuscation: A New Paradigm for Obfuscating Circuits, IEEE Transactions on Very Large Scale Integration Systems, 2021, Vol. xx, No. 1, pp. 1--14. PDF

DOI: 10.xxxx/TVLSI.2021.xxxxxxxx

[J12] Qingzhe Li, Liang Zhao, Yi-Ching Lee, Avesta Sasan, Jessica Lin,

CPM: A general feature dependency pattern mining framework for contrast multivariate time series, Pattern Recognition, 2021, Vol. 112, No. 1, pp. 107711. PDF

DOI: 10.1016/j.patcog.2020.107711

[J11] Sai Manoj Pudukotai Dinakarrao, Xiaojie Guo, Hossein Sayadi, Cameron Nowzari, Avesta Sasan, Setareh Rafatirad, Liang Zhao, Houman Homayoun,

Cognitive and Scalable Technique for Securing IoT Networks Against Malware Epidemics, IEEE Access, 2020, Vol. 8, No. 1, pp. 138508--138528. PDF

DOI: 10.1109/ACCESS.2020.3011919

[J10] Katayoun Neshatpour, Houman Homayoun, Avesta Sasan,

ICNN: The Iterative Convolutional Neural Network, ACM Transactions on Embedded Computing Systems (TECS) , 2020, Vol. 18, No. 6, pp. 119:1--119:27. PDF

DOI: 10.1145/3355553

[J9] Shervin Roshanisefat, Hadi Mardani Kamali, Houman Homayoun, Avesta Sasan,

SAT-Hard Cyclic Logic Obfuscation for Protecting the IP in the Manufacturing Supply Chain, IEEE Transactions on Very Large Scale Integration Systems , 2020, Vol. 28, No. 4, pp. 954-967. PDF

DOI: 10.1109/TVLSI.2020.2968552

[J8] Kimia Zamiri Azar, Hadi Mardani Kamali, Houman Homayoun, Avesta Sasan,

SMT Attack: Next Generation Attack on Obfuscated Circuits with Capabilities and Performance Beyond the SAT Attacks, IACR Transactions on Cryptographic Hardware and Embedded Systems, 2019, Vol. 2019, No. 1, pp. 97--122. PDF

DOI: 10.13154/tches.v2019.i1.97-122

[J7] Katayoun Neshatpour, Maria Malik, Avesta Sasan, Setareh Rafatirad, Tinoosh Mohsenin, Hassan Ghasemzadeh, Houman Homayoun,

Energy-efficient acceleration of MapReduce applications using FPGAs, Journal of Parallel and Distributed Computing, 2019, Vol. 119, No. 1, pp. 1--17. PDF

DOI: 10.1016/j.jpdc.2018.02.004

[J6] Katayoun Neshatpour, Maria Malik, Avesta Sasan, Setareh Rafatirad, Houman Homayoun,

Hardware Accelerated Mappers for Hadoop MapReduce Streaming, IEEE Transactions on Multi-Scale Computing Systems, 2018, Vol. 4, No. 4, pp. 734--748. PDF

DOI: 10.1109/TMSCS.2018.2854787

[J5] Avesta Sasan, Kiarash Amiri, Houman Homayoun, Ahmed M. Eltawil, Fadi J. Kurdahi,

Variation Trained Drowsy Cache (VTD-Cache): A History Trained Variation Aware Drowsy Cache for Fine Grain Voltage Scaling, IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2012, Vol. 20, No. 4, pp. 630--642. PDF

DOI: 10.1109/TVLSI.2011.2106523

[J4] Avesta Sasan, Houman Homayoun, Ahmed M. Eltawil, Fadi J. Kurdahi,

Inquisitive Defect Cache: A Means of Combating Manufacturing Induced Process Variation, IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2011, Vol. 19, No. 9, pp. 1597--1609. PDF

DOI: 10.1109/TVLSI.2010.2055589

[J3] Houman Homayoun, Avesta Sasan, Jean-Luc Gaudiot, Alexander V. Veidenbaum,

Reducing Power in All Major CAM and SRAM-Based Processor Units via Centralized, Dynamic Resource Size Management, IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2011, Vol. 19, No. 11, pp. 2081-2094. PDF

DOI: 10.1109/TVLSI.2010.2064185

[J2] Houman Homayoun, Avesta Sasan, Alexander V. Veidenbaum, Hsin-Cheng Yao, Shahin Golshan, Payam Heydari,

MZZ-HVS: Multiple Sleep Modes Zig-Zag Horizontal and Vertical Sleep Transistor Sharing to Reduce Leakage Power in On-Chip SRAM Peripheral Circuits, IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2011, Vol. 19, No. 12, pp. 2303-2316. PDF

DOI: 10.1109/TVLSI.2010.2086500

[J1] Avesta Sasan, Amin Khajeh, Ahmed M. Eltawil, Fadi J. Kurdahi,

A Low Power JPEG2000 Encoder With Iterative and Fault Tolerant Error Concealment, IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2009, Vol. 17, No. 6, pp. 827--837. PDF

DOI: 10.1109/TVLSI.2009.2016714

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