Work individually, but I strongly recommend working with someone in the class nearby so you can help each other when you get stuck, with consideration to the Course Collaboration Policy. Please send me email if something isn't clear and I will update the assignment. Changes are logged at the bottom of this page.
Notes:
Do not include the problem statement in your submission, just your answers. Or if you really want to include it, show it in a different font such as italics.
Run all compiles with "medium" effort unless told otherwise. Do not modify the synthesis script except for functional purposes (e.g., to change or add source file names). There are many knobs to enhance synthesis results but that is not our focus. If you would like to improve the script, please talk to me and we can see if it makes sense to add it to the base script.
inA inB outExp outMantissa Correct? -------- -------- ------ -------------- -------- 10101100 00110101 110010 01100110100101 Y 00000101 10110101 101010 01010101010101 Y 01010100 11101010 010100 11010101100101 no
To receive more than 30% of the maximum number of points, all problems must show "reasonable" numerical accuracy considering the datapath widths.
a) [20 points] Design and implement a 16-point radix-2 complex FFT in matlab using complex variables, exp(–j*x) for W_{N} calculations, and one or more 16-element arrays for the memory.
b) [30 points] Show that your FFT correctly calculates an FFT for
a random input by comparing it in matlab using:
in = (1.99*rand(1,16) -1) + j*(1.99*rand(1,16) -1);
plot_complex(in); % look at waveform if you like
difff(fft(in)*Scale, out);
where Scale is a real constant specific to your design.
Turn in: 1) the difff() plot, and 2) the text output of difff().
Suggestion: if you are having trouble implementing a 16-point FFT, try using simpler inputs such as the ones in Problem 3, or implementing an 8-point or 4-point FFT first.
Repeat the requirements in problem 2 but now the input, output, and all values between stages must be 16-bit values with valid ranges matching 16-bit 2's complement words. Round extra bits from wide numbers at the end of each stage; saturation would destroy SNR for large input waveforms.
c) [10 points] State the "x.y" number format for the input, output, and all values between stages.
d) [30 points] Repeat (b) with all inputs equal to (MaxNegative + j*MaxNegative). Of course Scale must be kept the same--this is a test of whether the internal scaling was done properly.
Design, implement, write verilog, and synthesize a super-fast 16-point complex Radix-2 Decimation-In-Time (DIT) Fast Fourier Transform processor that processes a complete transform every clock cycle, though it has a latency of five cycles. Register all inputs as they enter fft.v before using them, register all values between FFT stages, and register all outputs of fft.v before they exit the unit.
Top-Level Block Diagram +-----+ 16*16 | | 16*16 in_real00 - in_real15 ---/---| fft |---/--- out_real00 - outreal15 in_imag00 - in_imag15 ---/---| |---/--- out_imag00 - outimag15 16*16 | | 16*16 +-----+The key block signals are (others may be added as needed within reason):
Verilog
Several verilog modules for a completely different iterative FFT with multipliers outside the fft have been written that may be helpful. They are written with different sizes and word widths--so you must modify them. They are also not debugged and may not even be useful! The modules are located in this directory.
Use your FFT engine to build a cognitive radio spectrum analyzer which examines 16 frequency bands and identifies the three bands which have the lowest spectral magnitude. The system has the following inputs and outputs:
You may find it handy to declare variables as signed in verilog test code and print them using $fwrite so both positive and negative numbers print correctly.
You may need to neglect samples near the beginning and end of your simulations to get 100% matching; this is ok if justified.
Updates: 2017/03/04 Posted 2017/03/09 Released 2017/03/11 Removed requirement of 2 diagrams for problems 3 and 4; now only one is required. Moved some instructions to the page header. A few other minor cleanup changes. 2017/03/14 Latency of FFT is five cycles, not four.