Submit: (1) all *.v hardware and necessary testing code you wrote (no generated or provided files), and (2) other requested items such as diagrams.
Upload a pdf copy of (1) and (2) to Canvas (under "Assignments"). Add titles to pages and file names so it is clear to which problem they belong. For example, Problem 1, prob1.v, prob1.vt,... Place all of your answers and code into a single pdf file with all problems and material in order.
Diagrams. If a problem requires a diagram, include details such as datapath, memory, control, I/O, pipeline stages, word widths in bits, etc. There must be enough detail so that the exact functional operation of the block can be determined by someone with a reasonable knowledge of what simple blocks do. A satisfactory diagram may require multiple pages of paper taped together into a single large sheet.
Verilog. If a problem requires a verilog design, turn in paper copies of both hardware and test verilog code.
a table printed by your verilog testbench module listing all inputs and corresponding outputs,
a simvision waveform plot which shows (labeled and highlighted) corresponding inputs and outputs, or
test code which compares a) your hardware circuit and
b) a simple
reference circuit (using high-level functions such as "+")—no
Include two copy & paste sections of text from your
simulation's output (one for pass, and one for fail where you
purposely make a very small change to either your
designed hardware circuit or your reference circuit
to force the comparison to fail) that look something like this:
input=0101, out_hw=11110000, out_ref=11110000, ok
input=0101, out_hw=11110000, out_ref=11110001, Error!
For 1 and 3, the output must be copied & pasted directly from the simulator's output without any modifications.
In all cases, Show how you verified the correctness of your simulation's outputs.
Synthesis. If a problem requires synthesis, turn in paper copies of the following. Print in a way that results are easy to understand but conserves paper (multiple files per page, 8 or 9 point font, multiple columns). Delete sections of many repeated lines with a few copies of the line plus the comment: <many lines removed> .
The "always @(*)" verilog construct may be used but keep an eye out for any situations where Design Compiler may not be compatible with it.
Run all compiles with "medium" effort. Do not modify the synthesis script except for functional purposes (e.g., to specify source file names).
Functionality. For each design problem, you must write by hand 1) whether the design is fully functional, and 2) the failing sections if any exist.
Point deductions/additions. TotalProbPts is the sum of all points possible.
inA inB outExp outMantissa I Certify Correct -------- -------- ------ -------------- ----------------- 10101100 00110101 110010 01100110100101 Y 00000101 10110101 101010 01010101010101 Y 01010100 11101010 010100 11010101100101 no // this indicates I recognize there is an error here
Clarity. For full credit, your submission must be easily readable, understandable, and well commented.
155 points total
Use your own algorithm, or try an algorithm that works like this:
a) [15 pts] Write the described function in matlab.
b) [5 pts] Assuming your function is called numppterms(), run the following bit of matlab code (a few points need fixing), submit the figure, and report the Total Sum for all numbers 0.5 – 100.00 .
StepSize = 0.5;
NumTermsArrayPos = zeros(1, 100/StepSize); % small speedup if init first
for k = StepSize : StepSize : 100,
NumTermsArrayPos(k/StepSize) = numppterms(k);
fprintf('Total sum for +0.5 - +100.00 = %i\n', sum(NumTermsArrayPos));
plot(StepSize:StepSize:100, NumTermsArrayPos, 'x');
axis([0 101 0 1.1* max(NumTermsArrayPos)]);
ylabel('Number of partial product terms');
coeff = [–15 –47 141 370 141 –47 –15];Assume the coefficients cannot be scaled smaller, but they can be scaled up to 2× larger. This implementation works with integers only, so round() all scaled coefficients.
a) [5 pts] How many partial products are necessary to implement the FIR filter with the given coefficients?
b) [5 pts] Find the scaling for the coefficients that yields the minimum number of partial products.
c) [5 pts] Turn in a plot of the number of required partial products vs. the scaling factor. The plot should look something like the simulated results this matlab code generates.
plot(0.5:0.001:1.0, round(5* rand(1,501)+1), 'x');
axis([0.48 1.02 0 6.5]); grid on;
ylabel('Number of partial product terms');
title('EEC 281, Hwk/proj 3, Problem x, Plot of simulated results');
d) [15 pts] Draw dot diagrams showing how the partial products would be
added (include sign extension) for the optimized coefficients you found
in (b), using the FIR architecture shown below and a
2's complement input word. Use 4:2, 3:2, and half adders as necessary
and no need to design the final stage carry-propagate adder.
[55 pts] Design of an area-efficient low-pass FIR filter. The filter must meet the following specifications when its sample rate is 100 MHz.
b) [10 pts] Either by hand or with a matlab function, repeatedly call lpfirstats(H,W) to find a reasonable small area filter. There is no need to write a sophisticated optimization algorithm, just something reasonable that does more than simple coefficient scaling. For example, making small perturbations to the frequency and amplitude values that remez() uses such as using 0.01 and other small values instead of 0.00 in the stopband.
It may be helpful to use the following matlab code. Remember that matlab vectors start at index=1 so H(1) is the magnitude at frequency=0.
coeffs1 = remez(numtaps-1, freqs, amps); coeffs2 = coeffs1*scale; coeffs = round(coeffs2); [H,W] = freqz(coeffs); H_norm = abs(H) ./ abs(H(1)); [ripple, minpass, maxstoplo, maxstophi] = lpfirstats(H_norm,W);
Assume area is: Total_num_partial_products + 2*Num_filter_tapsExamples from a previous year of the difference between good optimizations and weaker ones--these are class results for ten students for a different filter than the one assigned here:
109 area, 31 taps, 47 PPs 109 area, 31 taps, 47 PPs 113 area, 33 taps, 47 PPs 114 area, 33 taps, 48 PPs 123 area, 33 taps, 57 PPs 128 area, 34 taps, 60 PPs 182 area, 55 taps, 72 PPs 221 area, 59 taps, 103 PPs 221 area, 59 taps, 103 PPs 250 area, 61 taps, 128 PPs
i) [5 pts] Filter coefficients
ii) [10 pts] The number of taps, number of required partial products, area estimate, and the attained values for the four filter criteria in dB.
iii) [10 pts] A plot made by: plot_one_lpfir.m (that requires updating) to show the filter's frequency response.
iv) [5 pts] A stem() plot of the filter's coefficients.
d) [5 pts] Upload to canvas:
i) Your modified version of plot_one_lpfir.m, and
ii) Filter coefficients for your smallest-area filter in a matlab-readable vector in a text file called coeffs.m; for example:
coeffs = [1 4 -8 25 -8 4 1];
[40 pts] Design an adder that adds four
4-bit inputs and then
saturates the sum to 4 bits. Submit the following:
1) [5 pts] a circuit diagram,
2) [5 pts] calculate the range of the unsaturated sum, and the range of the saturated output,
3) [10 pts] a dot diagram,
4) [10 pts] verilog for the design using "+" for the adders,
5) [10 pts] test your verilog design with at least 15 test cases including all extreme input cases, and verify using method ***(1).
Updates: 2022/02/11 Posted