EEC 116 - Tips for Debugging and Speeding Up Circuits using Magic and IRSIM

Debugging circuits

Is your circuit not working as you expect? Try these first.

Check circuit / stick diagram / layout
1. Check transistor-level schematic (if you don't have one, draw one now).
2. Check stick diagram, make sure the circuit matches the schematic (if you don't have one, draw one now).
3. Check that magic layout matches the stick diagram.
4. Verify magic connections and node names.
  - Select all important nodes including Vdd and Gnd, one at a time, by pressing "s" two or three times while hovering your cursor over some paint in magic.
  - Type 'getnode' to get the "real" node name and verify magic is using what you think it should be using. This is the name that IRSIM uses.
5. Verify all power nodes are called Vdd and all ground nodes are called GND using getnode.
6. Once the connections are verified correct, fix any DRC errors in the circuit. You can find the cause of an error by placing the box around the white dotted paint and typing 'y' or 'drc why'.
Check extraction

If magic gives warnings when you extract your layout,
1. Put a box around white warning paint and type 'feedback why'.
2. Fix cause of warning(s).
3. Type 'feedback clear' to clear warnings.
4. Repeat until all warnings are solved
Debug circuit
1. Select important nodes (including inputs, outputs, Vdd, and GND of gates) one at a time, using "s" in magic and verify the connections are what you expect, paying special attention to possible shorts and opens.
2. Type 'analyzer nodename' in IRSIM to see all key signals inside your simulation.
3. Debugging rules:
  1. Start at the inputs, move a node at a time toward the outputs
  2. Check that block inputs are correct
  3. Check outputs of gates which have block inputs as the gates' inputs
  4. Think very hard while studying the waveforms on irsim's analyzer—this is the quickest way to get a design working.
  5. [repeat] You will find the bug(s).
4. Finding the source of X's
  1. Start with a node that has gone X, move a node at a time toward the inputs of that gate.
  2. [repeat] Until the source of the X's is found.
  3. Focus 100% of your attention on finding and debugging the node that is the first one to go X.
If nothing is working right

Copy all of your .mag files to a temporary working folder and restart magic in that folder. For example, using the commands:
1. mkdir temp
2. cp *.mag temp/
3. cd temp/
4. magic116 top_level_cell_name In this layout, remove paint to effectively "cut wires" in it until it works.

Using IRSIM to find slow circuit paths

To speed up a circuit, start by finding the slowest paths. Use a small step size in your simulation and then type 'path nodename' to see the transitions in that node all the way back to the input. The slow nodes in that path are the ones to speed up!

EEC 116 | B. Baas | ECE Dept. | UC Davis

2004/04/08  Written
2004/05/20  Added more magic tips and irsim section
2004/05/24  Schematic tips
2004/05/27  Irsim path command
2005/05/23  Updated for spring 05
2005/05/31  Added area calculation thanks to Jeremy Webb
2006/04/11  Updated for Spring 2006
2006/06/05  Added top-level power node hint
2008/04/30  Touched up magic error messages
2009/06/01  Touched up debugging notes
2010/10/19  Touched up and moved portions to magic.tips.html
2012/12/09  Added suggestion to copy cell and remove layout
2017/12/11  Added section on outputs going "x"; minor edits
2017/12/13  Major edits in section 1
2018/09/26  Fixed typo: drc why is "y" (BB)
2018/10/22  Moved magic links to CAD environment page (BB)
2018/11/21  Reformatted entire page and made a few minor edits (BB)
2018/12/10  Minor additions and edits (BB)
2019/12/07  Minor edits (BB)
2020/11/02  Added 's' command to check for short circuits (BB)
2020/11/17  Re-wrote some sections with new info (BB)
2023/12/07  Minor formatting clarifications. (BB)