**Web Page:**- http://www.ece.ucdavis.edu/~hurst/EEC210
**Course Time and Location:**- 1128 Hart
- T, Th 10:30-noon
**Instructor:**- Professor Paul Hurst
- Office: 2031 Engineering II
- Office Hours: Tu 2:45-3:45 pm and Th 12:30-1pm and 2:10-3 pm
**Required Text:***Analysis and Design of Analog Integrated Circuits*, Gray, Hurst, Lewis, and Meyer, 5th Edition, John Wiley & Sons, 2009.**Reference Texts:***Analog Integrated Circuit Design*, Johns and Martin, John Wiley & Sons, 1997.*Design of Analog Integrated Circuits*, Razavi, McGraw-Hill, 2001.*CMOS Circuit Design, Layout, and Simulation*, Baker, Li, and Boyce, IEEE Press, 1998*Analog MOS Integrated Circuits for Signal Processing*, Gregorian and Temes, John Wiley & Sons, 1986.*Bipolar and MOS Analog Integrated Circuit Design*, Grebene, John Wiley & Sons, 1984.

**Prerequisites:**- EEC 110B and 140B

**Objectives:**- This course concentrates on analog circuits using CMOS technologies. After taking this course, a student should understand:
- Models for CMOS devices
- CMOS amplifier and reference circuits
- Compensation techniques for amplifiers
- Simple noise-analysis techniques for CMOS amplifiers
- The use of the SPICE circuit-simulation program

**Grading:**- There will be about nine homework assignments, one design project,
one midterm exam,
and one final exam.
The midterm exam date will be announced about 2 weeks before the
exam. The final exam will be held
on Friday, 12/14 from 3:30pm-5:30pm.
The weighting used for the final course grade will be:
Homework 12% Project 13% Midterm Exam 30% Final Exam 45%

**Reading Assignments:**- All reading assignments refer to sections in:
*Analysis and Design of Analog Integrated Circuits*, Gray, Hurst, Lewis, and Meyer, 5th Edition, Wiley, 2009.**Topic****Reading**MOS Transistors and Technology Sec. 1.1-1.2, 1.5-1.9

Basic MOS Amplifiers Sec. 3.1, 3.2, 3.3.2, 3.3.4, 3.3.5, 3.3.7, 3.3.9, 3.4.2.2, 3.4.3, 3.4.4 Differential Pairs Sec. 3.5.3, 3.5.4, 3.5.5, 3.5.6.1, 3.5.6.6-3.5.6.9 Current Sources and Active Loads Sec. 4.1, 4.2.1, 4.2.2.2, 4.2.3.2, 4.2.4.2, 4.2.5.2, 4.2.6.2, 4.3.1-4.3.5, A4.1.2, A4.2.2 Reference Circuits Sec. 4.4 MOS Two-Stage Op Amp Sec. 6.1-6.4 Frequency Response Sec. 7.1-7.3, 7.5 (skip material on bipolar transistors) Stability and Compensation Sec. 9.1-9.4, 9.6 (skip material on bipolar transistors) Introduction to Noise Sec. 11.1-11.8 (skip material on bipolar transistors)

Unless noted others, homeworks are due in the ECE 210 box in 2131 Kemper at noon on Wed, about 7 days after the HW is posted. So, HW 1 is due Oct 10, and HW2 is due Oct 17, ...**Homework #1**: Homework #1**Homework #2**: Homework #2 Here's a simple transistor model that you can use for the SPICE run:.model cmosn nmos level=1 lambda=0.0 vto=0.7 kp=89.7u gamma=0.19 phi=0. 6

**Homework #3**: Homework #3**Homework #4**: Homework #4**SPICE Level 2 Model for HW 4, Problem 3**: Level 2 Model**Homework #5**: Homework #5**SPICE Models for bipolar xtrs for HW 5**: PNP Models**Homework #6**(due Tu 11/20 at 5pm): Homework #6**Homework #7**(Do Not Turn In) Homework #7**Homework #8**(Do Not Turn In) Homework #8**Homework #9**(Do Not Turn In) Homework #9**Single Xtr MOS Amplifier Models**: MOS Amplifer Models**HSPICE information:**

- HSPICE Quick Reference
**HSPICE/SPICE examples:**: HSPICE/SPICE Example Input Files=======================

**The Project Handout:**: Project**HSPICE Template File (edit this for HSPICE sims)**: Template**MIDTERM SOLUTIONS**: Midterm Solutions**Grades**: Grades**Final: ave = 60.9/91; std. dev. = 15, high = 81.5, low = 30**