UNIVERSITY OF CALIFORNIA, DAVIS

Department of Electrical and Computer Engineering

Engineering 100

Electronic Circuits and Systems


Course Outline

Spring 2016

NOTE: FINAL - June 4, Saturday 8am-10 in our classroom. No calculators. Bring three 8.5"x11" page of your notes (you can write both sides on each piece of paper).
Lab 7 reports are due by 11am Monday 6/6 in the E100 box for your lab section in 2131 Kemper.
(since the quarter is ending - late Lab 7 reports will not be graded)

Office Hours on Friday for the Final:

Yanpeng D. Fri 10-11am and Fri 6-8pm in Kemper 1107.
Ashwin G. Fri 1-2:30pm in 2101 Kemper
P. Hurst Fri 2:30-4pm in 2031 Kemper.
NO SAMPLE FINAL EXAM (sorry). You can look at the Sample Midterms, your midterms, and the problem sets for example problems.

Course Time and Location:
1309 Surge 3
T, Th 12:10 - 1:00pm

Instructor:
Paul Hurst
Office: 2031 Kemper
Office Hours: Tu Th 9:30-10:30am
Please contact me in person
instead of by email. (Email for an emergency: hurst@ece.ucdavis.edu)


Extra Office Hours for Midterm 2:

Lab Periods: Wed and Th before midterm
TA Yanpeng Dong: Mon 5/23 10:30-12:30 2101 Kemper
TA Ashwin G.: Mon 5/23 1-2pm 2101 Kemper
TA Sushma S.: Tu 5/24 10:30-11:30am 2003 Kemper
(Note: P. Hurst will not have office hour on 5/24 due to travel)


Teaching Assistants:
NameLab Section(s)OfficeOffice Hours (tentative)Email
Sushma ShrinivasanW 2pm Th 2pm 2161 Kemper W 1-2pm & 5-5:30pm
sshrinivasan@ucdavis.edu
Emily FosterThur 6:30pm 2161 Kemper Tu 2-3pm Th 6-6:30pm & 9:30-10pm
erfoster@ucdavis.edu
Yanpeng Dong (W 9am) Th 6:30pm 2161 Kemper M 11am-12pm & Tu 3-4pm
ypdong@ucdavis.edu
Yanpeng Dong (W 9am) Th 6:30pm 1107 Kemper Fri 10-11am
ypdong@ucdavis.edu
Saneel Khatri Thur 2pm 2161 Kemper Th 1-2pm and Th 5-6pm
snkhatri@ucdavis.edu
Ashwin GanapathyWed 9am and 2pm 2161 Kemper W 8:30-9am & 12-1pm
aganapathy@ucdavis.edu


Required Text:
Fundamentals of Electrical Engineering, Leonard S. Bobrow, Second Edition, Oxford, 1996.

Syllabus: E100 Syllabus

Prerequisites:
Engineering 17

Objectives: After taking this course, the student should:

  1. Understand the concept of a filter,
  2. Be able to create Bode magnitude and phase plots,
  3. Be able to analyze and design simple circuits that use operational amplifiers,
  4. Understand simple digital logic circuits at the gate level and logic functions

Weighting:
Type Dates Weight
HomeworkSee below 0%
LabSee below25%
Midterm Exam #1May 3 20%
Midterm Exam #2May 24 20%
Final ExamJune 4: 8:00am-10:00am35%


READING and HOMEWORK: The table below shows reading and homework assignments. For HOMEWORK SOLUTIONS, please see the bottom of this web page. Solutions will be posted after the 'do' date.

Reading SectionsHomework Problems"Do" Date
Ch. 1-4 (except 2.4)1.47, 2.6, 2.11, 4.15, 4.18 Apr. 8
5.1, 5.2, 5.3, 5.45.1, 5.5, 5.11, 5.13 Apr. 15
2.45.19, 2.27, 2.29, 2.35 Apr. 22
10.2 (pages 667-674), 10.3, 11.0-11.2
5.3 (note: half-power freq = break or cutoff freq), 10.45,
11.2, 11.3, 11.10, 11.15(a) and (b)
NOTE: in 11.2 - consider all the binary numbers to be positive
(so add a '0' sign bit on the far left of each binary number to give a positive 2's complement number)
NOTE: in 11.10 and 11.15 - consider all the numbers n and m to be positive
(so add a '0' sign bit on the far left of each binary number to give a positive 2's complement number)
May 9
11.3-11.5
11.29, 11.26, 11.31, 11.45 May 16
11.6
11.51**, 11.53, 11.57, 11.58
** Note: One function in 11.51 cannot be simplified.
May 27
12.3 (SR & D FFs), 13.1 (skim), pp. 891-896 (Converters)12.26, 13.4, 13.28
In 13.4, the counter outputs are Q3,Q2,Q1
June 3



LAB: The lab is held in 2161 and 2157 Kemper Hall. The experiments are posted on line (see below). The table below shows the lab schedule.

Some important lab-report information is here: Lab Information

Sec. A01, A04
Wed
Sec. A02, A03
Thurs
Exp.* Prelab* Topic
4/64/7 lab1.pdf None Laboratory Equipment
4/134/14 lab2.pdf See lab ## Passive First-Order Filter Circuits
4/204/21 lab3.pdf prelab3.pdf Passive Second-Order Filter Circuits: BPF
5/45/5 lab4.pdf None ** Operational Amplifier
5/115/12 lab5.pdf prelab5.pdf Op Amps in Filters
5/255/26 lab6.pdf See the lab ++ Logic Circuits Introduction
6/16/2 lab7.pdf prelab7.pdf Logic Circuits II
* Each student should print the prelab and the lab experiment and do the prelab before arriving in lab.

## Due to the rapid pace of the class, it may be difficult to do the prelab calculations for lab 2 before you do that lab. Therefore, you can do those calculations after you do the lab measurements. But doing those calcluations before the lab would provide some insight into what to expect during data collection.

Information on buying a protoboard (one is needed for each lab group, after lab 1): Protoboard information

Optional reading: information on how oscilloscopes work can be found in this article: XYZs of Oscilloscopes

** The data sheet for the 741 op amp is available here: 741 Data Sheet
++ Pages 783 and 784 in the text book provide useful information for Part 4. Also, the data sheet for the 7400/74LS00 NAND gate is available here: NAND Gate Data Sheet


To access any PDF file, you will need to use Acrobat Reader. If you do not have a copy of the Reader, you can download it from Adobe.

Homework and Midterm Solutions:

  • Homework #1 Solution: o Homework #1 Solution
  • Homework #2 Solution: o Homework #2 Solution Note: Prob 5.13 is a Low-Pass Filter.
  • Homework #3 Solution: o Homework #3 Solution Note on 5.19: There are multiple ways to factor a transfer function. The solution here for 5.19 is correct but the factoring is not following the problem statement. A solution that follows the problem statement is below:
  • Problem 5.19 of Homework #3 - A Better Solution: o Problem 5.19 Better Solution
  • A Past Midterm #1 : o Sample Midterm #1
  • Our Midterm #1 Solution: o Midterm #1 Solution
    (Midterm 1 Statistics: Ave = 50.8/60, High=60, Low=26, std. dev. = 9.2)
  • Homework #4 Solution: o Homework #4 Solution
  • Homework #5 Solution: o Homework #5 Solution
    Note: The Boolean Algebra maninpulations below the circuit schematic in the solution to 11.29 are For Your Information Only. You don't need to know how to carry out those manipulations for any exam in E100.
  • A Past Midterm #2 : o Sample Midterm #2
  • Homework #6 Solution: o Homework #6 Solution
    Note: Prob 11.57c: The '1' in column 2, row 3 should be circled. It is correctly included in the logic expression.
  • Our Midterm #2 Solution: o Midterm #2 Solution
    (Midterm 2 Statistics: Ave = 48.8/53, High=53, Low=29, std. dev. = 4.3)
  • Homework #7 Solution: o Homework #7 Solution

    NO SAMPLE FINAL EXAM (sorry). You can look at the Sample Midterms, your midterms, and the problem sets for example problems.

    Final Statistics: ave = 113.4/130, std. dev = 11.9

    FOR FINAL EXAM SCORES - see Smart Site for E100
    FOR LETTER GRADES - will be submitted to the registar by noon on 6/10