EEC 281 - VLSI Digital Signal Processing
Winter 2025

Course Information

• Instructor
  Bevan Baas

• Teaching Assistant
  Yechengnuo Zhang
  ycnzh@ucdavis.edu

• Office hours
  Mon 11:50 am after lecture
  Wed 11:50 am after lecture
  Fri 2–3pm, Kemper 2101 (Feb 21, Kemper 2157)

• Lecture
  MW 10:30–11:50 am
  Bainer 1062

• Prerequisites: EEC 151 (formerly 150B), EEC 170, and EEC 180; or consent of instructor

• Catalog description

  Digital signal processors, building blocks, and algorithms. Design and implementation of processor algorithms, architectures, control, functional units, and circuit topologies for increased performance and reduced circuit size and power dissipation.

  Goals: Through this course, students will develop the necessary skills to design simple synthesizable processors suitable for numerically intensive processing with an emphasis on small chip area and high-performance. Secondly, students will learn to design processors for simple digital signal processing tasks through the simultaneous design of DSP algorithms, processor architectures, and hardware design.

• Grading

  • 75%   Homework/Projects (4)
  • 25%   Exam

  The exam covers material covered during the entire quarter. You may bring one page of double-sided hand-written (no photocopying) notes to the quizzes.

• Textbook: None required to purchase.

• Suggested references
  • Fundamentals of Digital Logic, with Verilog Design, Stephen Brown and Zvonko Vranesic. McGraw-Hill, 2003. Good overview of digital system design and many major building blocks with helpful verilog examples.

  • Computer Architecture, A Quantitative Approach, John Hennessy and David Patterson. Morgan Kaufmann, third edition, 2003. Probably the best reference for processor architectures. You should know this material already, so re-read material if you are rusty.

  • Getting Started with Matlab, Rudra Pratap. Oxford University Press, 2002. If you need a little help learning matlab, buy and read this. Chapter 2 has some nice tutorials, chapter 3 summarizes basic functions and file I/O, chapter 4 covers scripts, and chapter 6 gives a good overview of graphing. Concise with good coverage. $30 on amazon

  • Discrete-time Signal Processing, Oppenheim and Schaefer. Excellent reference for discrete-time systems, filtering, DFT, and other DSP algorithms.

  • Theory and Application of Digital Signal Processing, Rabiner and Gold. Excellent reference for a variety of FFT algorithms often with a good hardware perspective.

  • Digital Signal Processing: A System Design Approach, DeFatta, Lucas, and Hodgkiss. Contains good explanations and examples of multi-rate processing.

  • Other references

    • Computer Arithmetic, Algorithms and Hardware Designs, Behrooz Parhami. More thorough treatment of digital arithmetic. Notation is sometimes more complex than it needs to be, but the content is usually there.

    • VLSI Digital Signal Processing Systems: Design and Implementation, Keshab K. Parhi. Overviews many important topics in DSP processor design, but concepts are presented in a rigorous mathematical manner that is often hard to understand.

Course Readings

Homework / Projects

Future details are tentative.

Number	Due Date	Tentative % course grade	Material covered
1	Sun, Jan 26, 11:59 pm	18%	Binary arithmetic and conversion, verilog, and many-input adders
2	Sun, Feb 9, 11:59 pm	14%	Synthesis, adders, pipelining
3	Sun, Mar 2, 11:59 pm	18%	Digital filter tools, design, and optimization; saturation; rounding
4	Wed, Mar 19, 11:59 pm	25%	tan(θ) generator, convolutional neural net engine

Late work policy

All work for a particular hwk/project must be submitted at one time.

If an assignment is reviewed in class, no credit is possible for late work. If an assignment was not reviewed in class, there will be a 1/3 reduction of remaining credit per day (i.e., 100% → 67% → 44% → 30% ...).

Normally late work can not be accepted after its deadline however if a serious issue such as an illness prevents you from completing work on time, obtain a verifiable written excuse, bring it to the instructor, and something will be worked out.

The EEC 281 Course Collaboration Policy

Grading errors

Please request grading corrections within a week of being returned to you. Non-obvious or very minor grading issues will not result in increased points—due to fairness to all students, the inherent subjectiveness of grading which is rife with both missing-points and additional-points imperfections, and because it is physically impossible to go through submitted work of every student in extreme detail (which would be required for near-perfect fairness).

To request a regrade, submit: 1) a short description of the suspected grading error, 2) the following statement on your regrade request with your signature immediately below it: "I certify that I have not altered this work in any way after it was returned to me. I understand that such altering would constitute a violation of the Code of Academic Conduct."

Course Topics, Slides, Notes, and Handouts

Date	Topics	Handouts
Mon, January 6	Course introduction DSP overview	Course Introduction Key attributes of DSP processors
Wed, January 8	Seven basic diagrams Chip design methodologies, Multiply-accumulator (MAC), Convolution, FIR, dot products Quantization noise, word width, and SNR	Basic diagrams Chip design methodologies
Mon, January 13	Number representation I: fixed-pt integer Sign extension for 2's complement Number representation II: fixed-pt fractional Number representation III: Floating point Number representation IV: Block floating point	Quantization Noise and Word Size Sign Extension Floating Point
Wed, January 15	Number representation V: Redundant (carry-save) 3:2 carry-save adders 4:2 carry-save adders Fast carry-save addition Floating pt to fixed pt conversion Adders & subtractors	Float-Fixed conversion Adders & subtractors
Mon, January 20	Martin Luther King Jr. Day
Wed, January 22	Adders: multiple-input Verilog Overview Verilog Language basics Verilog Time and delay	Adders: Efficient Multiple Input Verilog 1: Overview Verilog 2: Language basics Verilog 3: Time and delay
Mon, January 27	Verilog Common mistakes Verilog Hardware vs. testing Verilog decoder examples Adders: faster carry-propagate Carry-Select adders Carry-Lookahead adders FFs, registers, and The 9 Rules	Verilog 4: Common mistakes Verilog 5: Testing Verilog 6: Decoder example Adders: Faster CPAs Flip-flops and registers
Wed, January 29	Robust clock design Critical timing relationships Synthesis Hardware multipliers Booth encoding of multipliers I Read paper by M. Santoro	Robust clock design Critical timing relationships SynthesisJAN 29, SLIDE 133 MultipliersJAN 29, Many edits. MAR 10, Slide 191 Booth encoding
Mon, February 3	Booth encoding of multipliers II Example multiplier Squaring Fixed-input multiplication	Example Multiplier Squaring Fixed Input Multiplication
Wed, February 5	dB Digital filters Time-domain convolution Frequency-domain multiplication Digital filter coefficient design Parks-McClellan and remez() Seeing the freq. response of filters Estimating spectral magnitude of signals FIR filter hardware FIR scaling	dB Digital Filter Coefficient Design Estimating Spectral Magnitude FIR filter hardwareFEB 10
Mon, February 10	Saturation Compression Rounding I	Saturation RoundingFEB 12, SLIDE 368
Wed, February 12	Rounding II Drive through processing Complex addition, multiplication, rotation, format conversion	Drive Through ProcessingFEB 12, Many edits Complex ArithmeticFEB 12, Many edits
Mon, February 17	Presidents' Day
Wed, February 19	Complex magnitude estimation Multiplication scaling Control circuits Counters	Complex Signal Magnitude Estimation Multiplication Scaling Control and counters
Mon, February 24	Finite state machine design Memories: categories, structures, types	FSMs Memories
Wed, February 26	Memories: macros, synthesized, off-chip Memories: using in standard-cell ASIC designs Generating complex functions I	Gen Complex Functions
Mon, March 3	Generating complex functions II Signals in time and frequency Multi-rate processing Upsampling, decimation I	Signals in Time and Frequency Multi-rate signal processing
Wed, March 5	Upsampling, decimation II Nyquist filters Nyquist filters with upsampling Discrete Fourier transform (DFT) Fast Fourier transform (FFT)	downsamp_movie.m Nyquist Filters DFT & FFT Background
Mon, March 10	Various FFT algorithms The RRI-FFT Linear convolution using DFT/FFTs Viterbi decoders	FFT Algorithms The RRI FFT Viterbi Decoding
Wed, March 12	Exam
Extra office hours: Fri, Mar 14, 2:00 pm [YZ] Sun, Mar 16, 2:00 pm [YZ], https://ucdavis.zoom.us/j/97293057834 Mon, Mar 17, 2:30 pm [BB] Tue, Mar 18, 2:30 pm [BB] Wed, Mar 19, 10:00 am [YZ], Kemper 2101 Wed, Mar 19, 2:30 pm [BB]

Reference material

Variable-freq clocking HW
Multiple Access
DSSS
DSSS Spreadsheet

Last update: March 18, 2025