EEC180 Tutorial: Using Altera/Intel M9K Memory Blocks

M9K memories are Altera's embedded high-density memory arrays. Nearly all modern FPGAs include something similar of varying sizes.

The M9Ks contain 8192 bits per block (9216 including parity bits) and are capable of very flexible port configurations. The best place to begin reading for more M9K memory block details are the M9K Handout and documentation covering the Max 10 FPGA.

This tutorial seems to pertain to only the DE10-Lite board since "Single uncompressed image" is not an option for Cyclone V device which is used on the DE1-SoC board.

Usage with Quartus

To properly initialize the M9K blocks, Quartus must be set up to include memory initialization data with the device's programming data (bitstream) by following these steps in Quartus before compiling:

1. Click Assignments → Device...

2. Click Device and Pin Options...

3. Go to the Configuration tab.

4. From the Configuration Mode drop-down, select Single Uncompressed Image with Memory Initialization. (typically Quartus is not set to use memory initialization by default)

2022/04/15  Added note regarding Cyclone V device.
2018/06/06  Minor edits (BB)
Written by Bevan Baas