EEC 116 Glossary of Technical Terms

Terms and acronyms commonly used in EEC 116.

Normally refers to ndiffusion and/or pdiffusion.

CMP (Chemical Mechanical Planarization or Chemical Mechanical Polishing)
A step in the fabrication process which results in an extremely flat chip surface.

DRC (Design Rule Check)
Computer program (or part of a CAD program) used to check design rules of layout.

DSM (Deep Sub-Micron)
Semiconductor fabrication technologies with minimum feature sizes well below 1 micrometer (micron). Very roughly includes technologies below 0.25 um.

Damaging effect on metal wires under high current conditions, which causes the movement of metal atoms and the possible eventual open-circuit or short-circuit failure of the wire. The effect is accelerated by uni-directional current and high temperature.

A memory element. Often used to describe edge-triggered memory elements. Rabaey uses the term to refer to any bistable component formed by cross-coupled gates.

CAD tool for switch-level circuit simulation; originally developed at Stanford.

A memory element. Normally used to describe transparent (i.e., when the clock is at its active level) memory elements.

CAD tool for full-custom chip layout; originally developed at UC Berkeley.

Term used to refer to any of the metallic upper interconnect layers in an integrated circuit. Layers are typically made of aluminum or more recently, copper. Advancing generations typically contain more metal layers. For example, 0.25µm / 5 layers, 0.18µm / 6 layers, 0.13µm typically has 8 metal layers.

NMOS (N-type MOS)
N-channel MOS transistor.

ndiff (or ndiffusion)
The heavily-doped n-type part of an NMOS transistor making up the transistor's source and drain.

A compound of oxygen with another element. Normally refers to silicon dioxide in the context of integrated circuits.

PMOS (P-type MOS)
P-channel MOS transistor.

pdiff (or pdiffusion)
The heavily-doped p-type part of an PMOS transistor making up the transistor's source and drain.

poly (polysilicon or polycrystalline silicon)
Material made of polycrystalline silison (neither perfectly crystalline nor amorphous) commonly used as the gate for modern MOS transistors.

A memory element. Often used to refer to either a latch of flip-flop. Rabaey uses the term to refer to edge-triggered memory elements.

sheet resistance
Resistance of a material with an assumed resistivity (ρ) and thickness. Uses units of Ω/square.

Silicon dioxide or SiO2
Electrically insulating material made of silicon and oxygen commonly used to insulate conductors and semiconductors in integrated circuits.

The silicon wafer onto which CMOS integrated circuits are built.

2005/04/02  Written
2006/04/11  Updated for Spring 2006
2013/10/21  Added CMP
2016/09/21  Formatting changes