EEC 116 - Special Nanometer-Scale Rules
1. Polysilicon 100 λ length limit
Polysilicon wires may not be longer than 100 λ beyond the
point where a metal wire (coming from the driver) transitions to a
The rule must be satisfied for the path from the source driver to
every destination in the metal/poly network.
(metal) | (poly) (metal)
to other Destinations
2. nwells and pwells
Draw nwells around all PMOS transistors and pwells around all NMOS
transistors and connect them to Gnd or Vdd as appropriate.
Place at least one nwell/psubstrate contact for every 3 squares of
3. Dummy polysilicon
- Polysilicon may be oriented in only one direction
for the entire chip.
- All polysilicon that is used for a functional circuit must have other
polysilicon at a distance of 8 λ the entire length of both
of its long edges. This implies the need for "dummy" poly.
- Polysilicon width may be only 2 λ unless stated otherwise.
- Polysilicon spacing may be only i) 8 λ or
ii) greater than 16 λ unless stated otherwise.
- Rule #2 above may be violated for a maximum length of 3 λ
- Rule #2 above may be violated for polysilicon-to-metal contacts.
Figure 1. Example polysilicon structures which satisfy traditional MOSIS
rules (top row), and functionally identical ones which satisfy the new
"nanometer scale" rules (bottom row).
2010/11/23 Added nwell/pwell rules
2010/11/24, 0400 Corrected rule 3.4 to 16 lambda, not 12 lambda