EEC 280: High-Performance System Design

Fall 2005

Prof. Vojin G. Oklobdzija
Telephone: 752-5634
Office Hours: TBD, and by appointment via e-mail: vojin@ucdavis.edu

 

Course Description:

This course addresses selected topics in logic design of complex and high-performance systems such as: advanced circuits technology for high-speed logic; low power ; clocking and timing of high performance systems; high-performance latch and pipelining; circuits design for fast computer arithmetic and algorithms; design methodology and use of hierarchy in the design.
 

This course is divided into six sections of study. Outline is as follows:
 

  1. Logic Design in New and Emerging Technologies:

    A. Basic relations and analysis of CMOS
    B. Differential Logic - Issues
    C. New developments and directions in CMOS
    D. Discussion and examples from advanced CMOS circuits.

  2. High-Performance sub-micron CMOS circuits:

    A. New Pass-Transistor Differential CMOS
    B. High-Speed and Low Power CMOS
    C. Examples from DPL and CPL

  3. Low-Power Logic:

    A. General Principles
    B. Principles of Adiabatic Logic
    C. Clocking, gates and latch design

  4. Timing and Clocking:

    A. Latch Design
    B. Clock Distribution Generation
    C. Methodology for Clocking and Clock Distribution : LSSD
    D. Relations between the critical path and latch parameters
    E. DEC Alpha clocking

  5. Advanced Pipelining:

    A. Pipeline Design
    B. Pipeline Scheduling - reservation tables
    C. Pipeline Hazards and conflict resolution
    D. Multi-level pipelines

  6. Arithmetic Algorithms and Technology Mapping:

    A. Mapping of Algorithms into Technology
    B. Fast ALU Design
    C. Fast Multipliers
    D. Shifters, Leading Zero Detector
    E. Data Paths

 

Prerequisite: BSEE or coursework / experience in logic and circuit design 
 

Text:

1. V.G. Oklobdzija,  "High-Performance System Design: Circuits and Logic",  IEEE Press, February 1999.

2. Design of High-Performance Microprocessor Circuits (chapter 10)
edited by Anantha Chandrakasan, MIT, William Bowhill, Compaq Computer
2001;Hardcover;2001;ISBN 0-7803-6001-X; Product No.: PC5836-TBR

Recommended Text:

3. Jan Rabaey. "Digital Integrated Circuits A Design Perspective", Prentice Hall 1996.

Supplemental Texts:

4. P. Koggie, "Design of Pipelined Computers", Mac Graw Hill

5. M.Ercegovac, T.Lang, "Digital Systems and Hardware/Firmware Algorithms", J. Wiley.

Grading: 

Homeworks 20%, Midterm I 40%, Midterm II 40%