EEC 280: Advanced Logic Design

Fall 2002

Prof. Vojin G. Oklobdzija
Telephone: 752-5634
Office Hours: MW 1:30-2pm, and by appointment via e-mail


Course Description:

This course addresses selected topics in logic design of complex and high-performance systems such as: advanced circuits technology for high-speed logic; low power ; clocking and timing of high performance systems; high-performance latch and pipelining; pipeline conflicts and hazard resolution; high-performance circuits for fast computer arithmetic and algorithms for fast computation; design methodology and use of hierarchy in the design. (detailed course description)


The course carry a project which may require the use of CAD tools (Cadence, H-Spice, Synopsys). It is possible to carry the project to implementation as an extension of this course (thesis project). The project is determined at the beginning of the course. The goal of this project is to provide a possible M.Sc. thesis to result in a publication, or provide a learning research experience.

This short course is divided into five sections of study. Outline is as follows:

I. Logic Design in New and Emerging Technologies:
A. Basic relations and analysis of CMOS

B. Differential Logic - Issues

C. New developments and directions in CMOS

D. Discussion and examples from advanced CMOS circuits.

II High-performance sub-micron CMOS circuits:

A. New Pass-Transistor Differential CMOS

B. High-Speed and Low Power CMOS

C. Examples from DPL and CPL.

III. Low-Power Logic:

A. General Principles

B. Principles of Adiabatic Logic

C. Clocking, gates and latch design

IV. Timing and Clocking:

A. Latch Design

B. Clock Distribution Generation

C. Methodology for Clocking and Clock Distribution: LSSD

D. Relations between the critical path and latch parameters

E. DEC Alpha clocking


V. Advanced Pipelining:

A. Pipeline Design

B. Pipeline Scheduling - reservation tables

C. Pipeline Hazards and conflict resolution

D. Multi-level pipelines


VI. Arithmetic Algorithms and Technology Mapping:

A. Mapping of Algorithms into Technology

B. Fast ALU Design

C. Fast Multipliers

D. Shifters, Leading Zero Detector

E. Data Paths

Prerequisite: BSEE or coursework / experience in logic and circuit design 


1. V.G. Oklobdzija,  "High-Performance System Design: Circuits and Logic",  IEEE Press, February 1999.

2. Design of High-Performance Microprocessor Circuits edited by Anantha Chandrakasan, MIT, William Bowhill, Compaq Computer
2001;Hardcover;2001;ISBN 0-7803-6001-X; Product No.: PC5836-TBR

Supplement (background) Text:

1. Jan Rabaey. "Digital Integrated Circuits A Design Perspective", Prentice Hall 1996.

2. P. Koggie,"Design of Pipelined Computers", Mac Graw Hill

3. M.Ercegovac, T.Lang,"Digital Systems and Hardware/Firmware Algorithms", J.Wiley

Grading: Two exams 20% first and 30% second, project 20%, homeworks 15% quizzes 15%.