EEC 272: High-Performance Computer Architecture: Super-Scalar Processor Design

Spring 2003

Prof. Vojin G. Oklobdzija

Telephone: 752-5634
Office Hours: Tu-Thr 4:30-5pm, and by appointment via e-mail


Course Description:

This course covers topics in high-performance computer design and architecture. Previous knowledge of computer architecture as well as computer design is necessary in order to attend and follow this course. The course deals with relationship between architecture and details of high-performance implementation. Examples and highlights of  modern microprocessors are discussed. The course teaches design techniques used in modern high-performance microprocessors and would  enable the student with the knowledge required to enter such a design team.


Course Outline:

This course would largely be following the textbook chapters. The outline of the topics covered is listed bellow:


I. Processor Design:
A. The Evolution of Microprocessors

B. Instruction Set Processor Design

C. Principles of Processor Performance

D. Instruction-Level Parallel Processing

II Pipelined Processors:

A. Pipeline Design Fundamentals

B. Pipelined Processor Design

C. Deeply Pipelined Processors

D. Encoding an Instruction Set

III. Superscalar Organization:

A. Limitation of Scalar Pipelines

B. From Scalar to Superscalar Pipelines

C. Superscalar Pipeline Overview

IV. Superscalar Techniques:

A. Instruction Flow Techniques

B. Register Data Flow Techniques

C. Memory Data Flow Techniques


VII. Survey of Superscalar Processors:

A. Development of Superscalar Processors

B. A Classification of Recent Designs

C. Processor Descriptions:

bullet Compaq / DEC Alpha
bullet Hewlett-Packard PA-RISC
bullet Intel i960
bullet Intel IA32
bullet MIPS
bullet Motorola 88220
bullet IBM Power
bullet PowerPC: The PowerPC 620
bullet SPARC Version 8 &9


VIII. Advanced Register Data Flow Techniques:

A. Value Locality and Redundant Execution

B. Exploiting Value Locality without Speculation

C. Exploiting Value Locality with Speculation



IX. Executing Multiple Threads:

A. Synchronizing Shared-Memory Threads

B. Introduction to Multi-Processor Systems

C. Explicitly Multithreaded Processors

D. Implicitly Multithreaded Processors

E. Executing the Same Thread

Prerequisite: EEC270 or equivalent coursework / knowledge of computer design.



1. John P. Shen, Mikko Lipasti, "Modern Processor Design: Fundamentals of Superscalar Processors", McGraw-Hill Publishing, to be published.

Alternate Books:

1. M. Johnson, "Superscalar Microprocessor Design", Prentice Hall, 1991.

Helpfull Books:

1. John L. Hennessy, David A. Patterson, "Computer Architecture: A Quantitative Approach", Morgan Kaufmann Publishers, 1996.

2. Readings in Computer Architecture edited by Mark D. Hill, Norman P. Jouppi, and Gurindar S. Sohi - web component

3. Siewiorek, Bell, Newell,  "Computer Structures: Principles and Examples", McGraw-Hill Publishing 1982.

4. V. G. Oklobdzija, Set of selected papers and notes.


Homeworks: 40%

Quizzes: 15%

Exam: 45%

Project (optional) 40% (of additional credit used against any of the above)