EEC 270: Computer Architecture Fall 2001
vojin@ece.ucdavis.edu
Telephone: 752-5634
Office Hours: M 4-5pm, by appointment via e-mail
Course Description:
This course covers advanced topics in computer architecture. Previous knowledge of computer architecture as well as computer design is necessary in order to attend and follow this course. The course deals with relationship between architecture and implementation, in particular high-performance system design and more recently low-power and embedded systems. (detailed course description)
Project:
Students are encouraged to carry a project in this course. The topic should be related to the course and material covered, however it is entirely up to the student to pursue the topic of his/her own interest. It is important that the student starts the project immediately rather than leaving it to the end of the course, since this will gurantee the failure. The list of possible projects could be found on various web pages of similar courses offered, for example start your search with architecture info pages.
I. Fundamentals of Computer Design:
A. Technology and Computer Usage TrendsB. Measuring and Reporting Performance
C. Quantitative Principles of Computer Design
D. Fallacies and Pitfalls
II Instruction Set Principles and Examples:
A. Classifying Instruction Set ArchitectureB. Operations in the Instruction Set
C. Addressing
D. Encoding an Instruction Set
E. The Role of Compilers
F. Historical Perspective
III. Pipelining:
A. General PrinciplesB. The Basic Pipeline
C. Pipeline Hazards:
a) Data Hazards
b) Control Hazards
E. Instruction Set Design and Pipelining
F. Performance and Pipelining
IV. Advanced Pipelining and Instruction-Level Parallelism:A. Instruction-Level Parallelism
B. Dynamic Scheduling
C. Reducing Branch Penalties: Dynamic Branch Prediction
D. Multiple Issue: Taking advantage of ILP
E. Compiler Support in Exploiting ILP
F. Hardware Support for Extracting More Parallelism
G. Historical Perspective
A. Cache Principles and Design
B. Reducing Cache Misses and Miss Penalty
C. Main Memory
D. Virtual Memory
E. Protection and Examples of Virtual Memory
F. Example: Alpha AXP 21064 Memory Hierarchy
A. Application Domains
B. Centralized Shared-Memory Architectures
C. Distributed Shared-Memory Architectures
D. Synchronization
E. Memory Consistency Models
F. Crosscutting Issues
Prerequisite:
EEC170 or equivalent coursework / knowledge of computer architecture