Research

Current Research Projects:

• Design and Analysis of Floating Point Software and Hardware Architectures
• Physical Design of Next-Generation Many-Core Processor
• Parallel Synthetic Aperature Radar Image Processing Application
• Biomedical Image Reconstruction on Massively Parallel Array
• Scientific Kernels on a Many-Core Array

Teaching:

• EEC180A Digital Systems I (Teaching Assitant in Fall 2012)
• EEC281 VLSI Digital Signal Processing (Teaching Assistant in Winter 2015)
• EEC180B Digital Systems II (Teaching Assistant in Spring 2016)

General Interests:

• High-Performance Low Power Many-Core Processor Architecture
• VLSI Design
• Floating-Point Unit Architectures
• Synthetic Aperature Radar Signal Processing
• Biomedical Imaging
• Scientific Workloads

Publications

Publications in review are provided to sponsors but not yet listed here.

• Jon Pimentel
  "Methods for Reducing Floating-Point Computation Overhead,"
  Ph.D. Dissertation, Technical Report ECE-VCL-2017-2,
  VLSI Computation Laboratory, ECE Department, University of California, Davis, August 2017
  


• Brent Bohnenstiehl, Aaron Stillmaker, Jon Pimentel, Timothy Andreas, Bin Liu, Anh Tran,
  Emmanuel Adeagbo and Bevan Baas,
  "KiloCore: A Fine-Grained 1000 Processor Array for Task Parallel Applications,"
  IEEE Micro, March/April 2017, In press.
  Invited.


• Brent Bohnenstiehl, Aaron Stillmaker, Jon Pimentel, Timothy Andreas, Bin Liu, Anh Tran,
  Emmanuel Adeagbo and Bevan Baas,
  "KiloCore: A 32 nm 1000-Processor Computational Array,"
  IEEE Journal of Solid-State Circuits (JSSC), In press.
  Invited.


• Brent Bohnenstiehl, Aaron Stillmaker, Jon Pimentel, Timothy Andreas, Bin Liu, Anh Tran,
  Emmanuel Adeagbo and Bevan Baas,
  "KiloCore: A 32 nm 1000-Processor Array,"
  In Proceedings of the IEEE HotChips Symposium on High-Performance Chips, (HotChips 2016), August 2016,
  Received an invitation to an IEEE Micro Special Issue.


• Jon Pimentel, Brent Bohnenstiehl and Bevan Baas,
  "Hybrid Hardware/Software Floating-Point Implementations for Optimized Area and Throughput Tradeoffs,"
  IEEE Transactions on Very Large Scale Integration Systems (TVLSI), vol. 25, no. 1, pp. 100-113, January 2017. (Official date of publication July 12, 2016).
  


• Brent Bohnenstiehl, Aaron Stillmaker, Jon Pimentel, Timothy Andreas, Bin Liu, Anh Tran,
  Emmanuel Adeagbo and Bevan Baas,
  "A 5.8 pJ/Op 115 Billion Ops/sec, to 1.78 Trillion Ops/sec 32 nm 1000-Processor Array,"
  IEEE Symposium on VLSI Circuits, Honolulu, HI, June 2016.
  Received an invitation to an IEEE Journal of Solid-State Circuits (JSSC) Special Issue.
  -Featured in Media:
  • PCWorld "Meet KiloCore, a 1,000-core processor so efficient it could run on a AA battery"
  • Engadget "Researchers build a 1,000-core processor"
  • Mashable "Researchers create low-energy, 1,000-core processor"


• Jon J. Pimentel, Aaron Stillmaker, Brent Bohnenstiehl, and Bevan M. Baas
  "Area Efficient Backprojection Computation with Reduced Floating-Point Word Width for SAR Image Formation,"
  IEEE Asilomar Conference on Signals, Systems and Computers (ACSSC), Pacific Grove, CA, November 2015.


• Aaron Stillmaker, Brent Bohnenstiehl, Jon Pimentel, and Bevan Baas
  "Energy-Efficient and High Performance Many-Core Arrays,"" Poster,
  SRC System Level Design Review, Hillsboro, OR, May 2015.
  


• Jon J. Pimentel, and Bevan M. Baas
  "Hybrid Floating-Point Modules with Low Area Overhead on a Fine-Grained Processing Core,"
  IEEE Asilomar Conference on Signals, Systems and Computers (ACSSC), Pacific Grove, CA, November 2014.
  Best Student Paper Award, Third Place.


• Jon J. Pimentel, and Bevan M. Baas
  "Software/Hardware Hybrid Floating-Point Units with Low Area Overhead on a Fine-Grained Processing Core,"
  Technology and Talent for the 21st Century (TECHCON 2014), Austin, TX, September 2014.
  

-Last updated: 08/09/2017