Milena Vratonjic

   PhD student

   Advanced Computer Systems Engineering Laboratory (ACSEL)

   Department of Electrical and Computer Engineering
   University of California, Davis

    Publications:
 

   [1] M. Vratonjic, B. R. Zeydel, V. G. Oklobdzija:
          "Circuit Sizing and Supply-Voltage Selection for Low-Power Digital Circuit Design",
          16th International Workshop on Power and Timing Modeling, Optimization and
          Simulation (PATMOS), Montpellier, France, Sept. 13-15, 2006.

   [2] M. Vratonjic, B. R. Zeydel, V. G. Oklobdzija:
          "Low- and Ultra Low-Power Arithmetic Units: Design and Comparison",
          ICCD 2005, San Jose, California, Oct. 2-5, 2005.

   [3] M. Vratonjic, B. R. Zeydel, H. Q. Dao, V. G. Oklobdzija:
          "Low-Power Aspects of Different Adder Topologies",
          37th Annual Asilomar Conference, Pacific Grove, California, Nov. 9-12, 2003.

   [4] M. Vratonjic, B. R. Zeydel, V. G. Oklobdzija:
          "Exploratory Designs for Low- and Ultra Low-Power Applications",
          TECHCON 2005, Semiconductor Research Corp, Portland, Oregon,
          Oct. 24-26, 2005.