Houman Homayoun is currently a Professor in the Department of Electrical and Computer Engineering at the University of California, Davis. He is also the director of the National Science Foundation Center for Hardware and Embedded Systems Security and Trust (CHEST). Before that, he was an Associate Professor in the Department of Electrical and Computer Engineering at George Mason University (GMU). From 2010 to 2012, he spent two years at the University of California, San Diego, as NSF Computing Innovation (CI) Fellow awarded by the CRA-CCC. Houman graduated in 2010 from the University of California, Irvine, with a Ph.D. in Computer Science. He was a recipient of the four-year University of California, Irvine Computer Science Department chair fellowship. Houman received an MS degree in computer engineering in 2005 from the University of Victoria and a BS degree in electrical engineering in 2003 from the Sharif University of Technology. Houman conducts research in hardware security and trust, applied machine learning and AI, data-intensive computing, and heterogeneous computing, where he has published more than 200 technical papers in prestigious conferences and journals on the subject and directed over $10M in research funding from NSF, DARPA, AFRL, NIST, US Congress, and various industrial sponsors. His work received several best paper awards and nominations in various conferences, including GLSVLSI 2016, ICCAD 2019, ICDM 2019, DCAS 2020, ISVLSI 2020, ICCAD 2020, DATE 2022. His CHEST center received congressional support for research in HW security which was included in 2021 National Defense Authorization Act. Houman served as a Member of the Advisory Committee, Cybersecurity Research and Technology Commercialization working group in the Commonwealth of Virginia. He also served as core group member of the hardware security body of knowledge development team supported by the Department of Defense. He was a recipient of the 2010 National Science Foundation computing innovation fellow award by CCC/CRA. Since 2017 he has been serving as an Associate Editor of IEEE Transactions on VLSI. He chaired and co-chaired major conferences in ACM, including Great Lake Symposium on VLSI.