| Hierarchy |
Input |
Constant Input |
Unused Input |
Floating Input |
Output |
Constant Output |
Unused Output |
Floating Output |
Bidir |
Constant Bidir |
Unused Bidir |
Input only Bidir |
Output only Bidir |
| u4|u4|bin |
24 |
0 |
0 |
0 |
30 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| u4|u4|u0|d3|altsyncram_component|auto_generated |
37 |
0 |
0 |
0 |
10 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| u4|u4|u0|d3 |
37 |
0 |
0 |
0 |
10 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| u4|u4|u0|d2|altsyncram_component|auto_generated |
37 |
0 |
0 |
0 |
10 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| u4|u4|u0|d2 |
37 |
0 |
0 |
0 |
10 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| u4|u4|u0|d1|altsyncram_component|auto_generated |
37 |
0 |
0 |
0 |
10 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| u4|u4|u0|d1 |
37 |
0 |
0 |
0 |
10 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| u4|u4|u0 |
43 |
3 |
0 |
3 |
20 |
3 |
3 |
3 |
0 |
0 |
0 |
0 |
0 |
| u4|u4 |
67 |
2 |
27 |
2 |
25 |
2 |
2 |
2 |
0 |
0 |
0 |
0 |
0 |
| u4|cnt |
3 |
4 |
0 |
4 |
16 |
4 |
4 |
4 |
0 |
0 |
0 |
0 |
0 |
| u4|u3 |
4 |
9 |
0 |
9 |
48 |
9 |
9 |
9 |
0 |
0 |
0 |
0 |
0 |
| u4 |
15 |
0 |
1 |
0 |
77 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| u3|pll_main25_inst |
2 |
0 |
0 |
0 |
2 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| u3 |
2 |
1 |
0 |
1 |
1 |
1 |
1 |
1 |
0 |
0 |
0 |
0 |
0 |
| u2 |
2 |
1 |
0 |
1 |
1 |
1 |
1 |
1 |
0 |
0 |
0 |
0 |
0 |
| u1|mpiv|DY |
1 |
0 |
0 |
0 |
1 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| u1|mpiv|rd |
20 |
8 |
0 |
8 |
19 |
8 |
8 |
8 |
0 |
0 |
0 |
0 |
0 |
| u1|mpiv|wpt |
36 |
8 |
0 |
8 |
3 |
8 |
8 |
8 |
0 |
0 |
0 |
0 |
0 |
| u1|mpiv|wrd |
52 |
8 |
0 |
8 |
28 |
8 |
8 |
8 |
0 |
0 |
0 |
0 |
0 |
| u1|mpiv|c1 |
33 |
32 |
0 |
32 |
1 |
32 |
32 |
32 |
0 |
0 |
0 |
0 |
0 |
| u1|mpiv |
2 |
0 |
0 |
0 |
3 |
0 |
0 |
0 |
1 |
0 |
0 |
0 |
0 |
| u1|camiv|DY |
1 |
0 |
0 |
0 |
1 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| u1|camiv|rd |
20 |
8 |
0 |
8 |
19 |
8 |
8 |
8 |
0 |
0 |
0 |
0 |
0 |
| u1|camiv|wpt |
36 |
8 |
0 |
8 |
3 |
8 |
8 |
8 |
0 |
0 |
0 |
0 |
0 |
| u1|camiv|wrd |
52 |
16 |
0 |
16 |
28 |
16 |
16 |
16 |
0 |
0 |
0 |
0 |
0 |
| u1|camiv|c1 |
33 |
32 |
0 |
32 |
1 |
32 |
32 |
32 |
0 |
0 |
0 |
0 |
0 |
| u1|camiv |
2 |
0 |
0 |
0 |
3 |
0 |
0 |
0 |
1 |
0 |
0 |
0 |
0 |
| u1 |
2 |
0 |
0 |
0 |
4 |
0 |
0 |
0 |
2 |
0 |
0 |
0 |
0 |