|vga_top
CLOCK_50 => rClk[0].CLK
CLOCK_50 => rClk[1].CLK
CLOCK_50 => blue[0].CLK
CLOCK_50 => blue[1].CLK
CLOCK_50 => blue[2].CLK
CLOCK_50 => blue[3].CLK
CLOCK_50 => blue[4].CLK
CLOCK_50 => blue[5].CLK
CLOCK_50 => blue[6].CLK
CLOCK_50 => blue[7].CLK
CLOCK_50 => green[0].CLK
CLOCK_50 => green[1].CLK
CLOCK_50 => green[2].CLK
CLOCK_50 => green[3].CLK
CLOCK_50 => green[4].CLK
CLOCK_50 => green[5].CLK
CLOCK_50 => green[6].CLK
CLOCK_50 => green[7].CLK
CLOCK_50 => red[0].CLK
CLOCK_50 => red[1].CLK
CLOCK_50 => red[2].CLK
CLOCK_50 => red[3].CLK
CLOCK_50 => red[4].CLK
CLOCK_50 => red[5].CLK
CLOCK_50 => red[6].CLK
CLOCK_50 => red[7].CLK
KEY[0] => reset_n.IN1
KEY[1] => ~NO_FANOUT~
KEY[2] => ~NO_FANOUT~
KEY[3] => HEX0[0].DATAIN
LEDR[0] <= SW[9].DB_MAX_OUTPUT_PORT_TYPE
LEDR[1] <= <GND>
LEDR[2] <= <GND>
LEDR[3] <= <GND>
LEDR[4] <= <GND>
LEDR[5] <= <GND>
LEDR[6] <= <GND>
LEDR[7] <= <GND>
LEDR[8] <= <GND>
LEDR[9] <= <GND>
SW[0] => ~NO_FANOUT~
SW[1] => ~NO_FANOUT~
SW[2] => ~NO_FANOUT~
SW[3] => ~NO_FANOUT~
SW[4] => ~NO_FANOUT~
SW[5] => ~NO_FANOUT~
SW[6] => ~NO_FANOUT~
SW[7] => ~NO_FANOUT~
SW[8] => ~NO_FANOUT~
SW[9] => LEDR[0].DATAIN
HEX0[0] <= KEY[3].DB_MAX_OUTPUT_PORT_TYPE
HEX0[1] <= <GND>
HEX0[2] <= <GND>
HEX0[3] <= <GND>
HEX0[4] <= <GND>
HEX0[5] <= <GND>
HEX0[6] <= <GND>
HEX0[7] <= <GND>
HEX1[0] <= <GND>
HEX1[1] <= <GND>
HEX1[2] <= <GND>
HEX1[3] <= <GND>
HEX1[4] <= <GND>
HEX1[5] <= <GND>
HEX1[6] <= <GND>
HEX1[7] <= <GND>
HEX2[0] <= <GND>
HEX2[1] <= <GND>
HEX2[2] <= <GND>
HEX2[3] <= <GND>
HEX2[4] <= <GND>
HEX2[5] <= <GND>
HEX2[6] <= <GND>
HEX2[7] <= <GND>
HEX3[0] <= <GND>
HEX3[1] <= <GND>
HEX3[2] <= <GND>
HEX3[3] <= <GND>
HEX3[4] <= <GND>
HEX3[5] <= <GND>
HEX3[6] <= <GND>
HEX3[7] <= <GND>
HEX4[0] <= <GND>
HEX4[1] <= <GND>
HEX4[2] <= <GND>
HEX4[3] <= <GND>
HEX4[4] <= <GND>
HEX4[5] <= <GND>
HEX4[6] <= <GND>
HEX4[7] <= <GND>
HEX5[0] <= <GND>
HEX5[1] <= <GND>
HEX5[2] <= <GND>
HEX5[3] <= <GND>
HEX5[4] <= <GND>
HEX5[5] <= <GND>
HEX5[6] <= <GND>
HEX5[7] <= <GND>
VGA_CLK <= clk_vga.DB_MAX_OUTPUT_PORT_TYPE
VGA_HS <= VGA_controller:vga_control.ovga_h_sync
VGA_VS <= VGA_controller:vga_control.ovga_v_sync
VGA_BLANK_N <= VGA_controller:vga_control.ovga_blank
VGA_SYNC_N <= VGA_controller:vga_control.ovga_sync
VGA_R[0] <= VGA_controller:vga_control.ored
VGA_R[1] <= VGA_controller:vga_control.ored
VGA_R[2] <= VGA_controller:vga_control.ored
VGA_R[3] <= VGA_controller:vga_control.ored
VGA_R[4] <= VGA_controller:vga_control.ored
VGA_R[5] <= VGA_controller:vga_control.ored
VGA_R[6] <= VGA_controller:vga_control.ored
VGA_R[7] <= VGA_controller:vga_control.ored
VGA_G[0] <= VGA_controller:vga_control.ogreen
VGA_G[1] <= VGA_controller:vga_control.ogreen
VGA_G[2] <= VGA_controller:vga_control.ogreen
VGA_G[3] <= VGA_controller:vga_control.ogreen
VGA_G[4] <= VGA_controller:vga_control.ogreen
VGA_G[5] <= VGA_controller:vga_control.ogreen
VGA_G[6] <= VGA_controller:vga_control.ogreen
VGA_G[7] <= VGA_controller:vga_control.ogreen
VGA_B[0] <= VGA_controller:vga_control.oblue
VGA_B[1] <= VGA_controller:vga_control.oblue
VGA_B[2] <= VGA_controller:vga_control.oblue
VGA_B[3] <= VGA_controller:vga_control.oblue
VGA_B[4] <= VGA_controller:vga_control.oblue
VGA_B[5] <= VGA_controller:vga_control.oblue
VGA_B[6] <= VGA_controller:vga_control.oblue
VGA_B[7] <= VGA_controller:vga_control.oblue


|vga_top|VGA_controller:vga_control
ired[0] => mvga_r[0].DATAB
ired[1] => mvga_r[1].DATAB
ired[2] => mvga_r[2].DATAB
ired[3] => mvga_r[3].DATAB
ired[4] => mvga_r[4].DATAB
ired[5] => mvga_r[5].DATAB
ired[6] => mvga_r[6].DATAB
ired[7] => mvga_r[7].DATAB
ired[8] => mvga_r[8].DATAB
ired[9] => mvga_r[9].DATAB
igreen[0] => mVGA_G[0].DATAB
igreen[1] => mVGA_G[1].DATAB
igreen[2] => mVGA_G[2].DATAB
igreen[3] => mVGA_G[3].DATAB
igreen[4] => mVGA_G[4].DATAB
igreen[5] => mVGA_G[5].DATAB
igreen[6] => mVGA_G[6].DATAB
igreen[7] => mVGA_G[7].DATAB
igreen[8] => mVGA_G[8].DATAB
igreen[9] => mVGA_G[9].DATAB
iblue[0] => mVGA_B[0].DATAB
iblue[1] => mVGA_B[1].DATAB
iblue[2] => mVGA_B[2].DATAB
iblue[3] => mVGA_B[3].DATAB
iblue[4] => mVGA_B[4].DATAB
iblue[5] => mVGA_B[5].DATAB
iblue[6] => mVGA_B[6].DATAB
iblue[7] => mVGA_B[7].DATAB
iblue[8] => mVGA_B[8].DATAB
iblue[9] => mVGA_B[9].DATAB
orequest <= orequest~reg0.DB_MAX_OUTPUT_PORT_TYPE
ored[0] <= ored[0]~reg0.DB_MAX_OUTPUT_PORT_TYPE
ored[1] <= ored[1]~reg0.DB_MAX_OUTPUT_PORT_TYPE
ored[2] <= ored[2]~reg0.DB_MAX_OUTPUT_PORT_TYPE
ored[3] <= ored[3]~reg0.DB_MAX_OUTPUT_PORT_TYPE
ored[4] <= ored[4]~reg0.DB_MAX_OUTPUT_PORT_TYPE
ored[5] <= ored[5]~reg0.DB_MAX_OUTPUT_PORT_TYPE
ored[6] <= ored[6]~reg0.DB_MAX_OUTPUT_PORT_TYPE
ored[7] <= ored[7]~reg0.DB_MAX_OUTPUT_PORT_TYPE
ored[8] <= ored[8]~reg0.DB_MAX_OUTPUT_PORT_TYPE
ored[9] <= ored[9]~reg0.DB_MAX_OUTPUT_PORT_TYPE
ogreen[0] <= ogreen[0]~reg0.DB_MAX_OUTPUT_PORT_TYPE
ogreen[1] <= ogreen[1]~reg0.DB_MAX_OUTPUT_PORT_TYPE
ogreen[2] <= ogreen[2]~reg0.DB_MAX_OUTPUT_PORT_TYPE
ogreen[3] <= ogreen[3]~reg0.DB_MAX_OUTPUT_PORT_TYPE
ogreen[4] <= ogreen[4]~reg0.DB_MAX_OUTPUT_PORT_TYPE
ogreen[5] <= ogreen[5]~reg0.DB_MAX_OUTPUT_PORT_TYPE
ogreen[6] <= ogreen[6]~reg0.DB_MAX_OUTPUT_PORT_TYPE
ogreen[7] <= ogreen[7]~reg0.DB_MAX_OUTPUT_PORT_TYPE
ogreen[8] <= ogreen[8]~reg0.DB_MAX_OUTPUT_PORT_TYPE
ogreen[9] <= ogreen[9]~reg0.DB_MAX_OUTPUT_PORT_TYPE
oblue[0] <= oblue[0]~reg0.DB_MAX_OUTPUT_PORT_TYPE
oblue[1] <= oblue[1]~reg0.DB_MAX_OUTPUT_PORT_TYPE
oblue[2] <= oblue[2]~reg0.DB_MAX_OUTPUT_PORT_TYPE
oblue[3] <= oblue[3]~reg0.DB_MAX_OUTPUT_PORT_TYPE
oblue[4] <= oblue[4]~reg0.DB_MAX_OUTPUT_PORT_TYPE
oblue[5] <= oblue[5]~reg0.DB_MAX_OUTPUT_PORT_TYPE
oblue[6] <= oblue[6]~reg0.DB_MAX_OUTPUT_PORT_TYPE
oblue[7] <= oblue[7]~reg0.DB_MAX_OUTPUT_PORT_TYPE
oblue[8] <= oblue[8]~reg0.DB_MAX_OUTPUT_PORT_TYPE
oblue[9] <= oblue[9]~reg0.DB_MAX_OUTPUT_PORT_TYPE
ovga_h_sync <= ovga_h_sync~reg0.DB_MAX_OUTPUT_PORT_TYPE
ovga_v_sync <= ovga_v_sync~reg0.DB_MAX_OUTPUT_PORT_TYPE
ovga_sync <= ovga_sync~reg0.DB_MAX_OUTPUT_PORT_TYPE
ovga_blank <= ovga_blank~reg0.DB_MAX_OUTPUT_PORT_TYPE
col[0] <= col[0]~reg0.DB_MAX_OUTPUT_PORT_TYPE
col[1] <= col[1]~reg0.DB_MAX_OUTPUT_PORT_TYPE
col[2] <= col[2]~reg0.DB_MAX_OUTPUT_PORT_TYPE
col[3] <= col[3]~reg0.DB_MAX_OUTPUT_PORT_TYPE
col[4] <= col[4]~reg0.DB_MAX_OUTPUT_PORT_TYPE
col[5] <= col[5]~reg0.DB_MAX_OUTPUT_PORT_TYPE
col[6] <= col[6]~reg0.DB_MAX_OUTPUT_PORT_TYPE
col[7] <= col[7]~reg0.DB_MAX_OUTPUT_PORT_TYPE
col[8] <= col[8]~reg0.DB_MAX_OUTPUT_PORT_TYPE
col[9] <= col[9]~reg0.DB_MAX_OUTPUT_PORT_TYPE
col[10] <= col[10]~reg0.DB_MAX_OUTPUT_PORT_TYPE
col[11] <= col[11]~reg0.DB_MAX_OUTPUT_PORT_TYPE
col[12] <= col[12]~reg0.DB_MAX_OUTPUT_PORT_TYPE
row[0] <= row[0]~reg0.DB_MAX_OUTPUT_PORT_TYPE
row[1] <= row[1]~reg0.DB_MAX_OUTPUT_PORT_TYPE
row[2] <= row[2]~reg0.DB_MAX_OUTPUT_PORT_TYPE
row[3] <= row[3]~reg0.DB_MAX_OUTPUT_PORT_TYPE
row[4] <= row[4]~reg0.DB_MAX_OUTPUT_PORT_TYPE
row[5] <= row[5]~reg0.DB_MAX_OUTPUT_PORT_TYPE
row[6] <= row[6]~reg0.DB_MAX_OUTPUT_PORT_TYPE
row[7] <= row[7]~reg0.DB_MAX_OUTPUT_PORT_TYPE
row[8] <= row[8]~reg0.DB_MAX_OUTPUT_PORT_TYPE
row[9] <= row[9]~reg0.DB_MAX_OUTPUT_PORT_TYPE
row[10] <= row[10]~reg0.DB_MAX_OUTPUT_PORT_TYPE
row[11] <= row[11]~reg0.DB_MAX_OUTPUT_PORT_TYPE
row[12] <= row[12]~reg0.DB_MAX_OUTPUT_PORT_TYPE
clk_vga => mVGA_V_SYNC.CLK
clk_vga => V_Cont[0].CLK
clk_vga => V_Cont[1].CLK
clk_vga => V_Cont[2].CLK
clk_vga => V_Cont[3].CLK
clk_vga => V_Cont[4].CLK
clk_vga => V_Cont[5].CLK
clk_vga => V_Cont[6].CLK
clk_vga => V_Cont[7].CLK
clk_vga => V_Cont[8].CLK
clk_vga => V_Cont[9].CLK
clk_vga => V_Cont[10].CLK
clk_vga => V_Cont[11].CLK
clk_vga => V_Cont[12].CLK
clk_vga => mVGA_H_SYNC.CLK
clk_vga => h_cont[0].CLK
clk_vga => h_cont[1].CLK
clk_vga => h_cont[2].CLK
clk_vga => h_cont[3].CLK
clk_vga => h_cont[4].CLK
clk_vga => h_cont[5].CLK
clk_vga => h_cont[6].CLK
clk_vga => h_cont[7].CLK
clk_vga => h_cont[8].CLK
clk_vga => h_cont[9].CLK
clk_vga => h_cont[10].CLK
clk_vga => h_cont[11].CLK
clk_vga => h_cont[12].CLK
clk_vga => orequest~reg0.CLK
clk_vga => ovga_v_sync~reg0.CLK
clk_vga => ovga_h_sync~reg0.CLK
clk_vga => ovga_sync~reg0.CLK
clk_vga => ovga_blank~reg0.CLK
clk_vga => oblue[0]~reg0.CLK
clk_vga => oblue[1]~reg0.CLK
clk_vga => oblue[2]~reg0.CLK
clk_vga => oblue[3]~reg0.CLK
clk_vga => oblue[4]~reg0.CLK
clk_vga => oblue[5]~reg0.CLK
clk_vga => oblue[6]~reg0.CLK
clk_vga => oblue[7]~reg0.CLK
clk_vga => oblue[8]~reg0.CLK
clk_vga => oblue[9]~reg0.CLK
clk_vga => ogreen[0]~reg0.CLK
clk_vga => ogreen[1]~reg0.CLK
clk_vga => ogreen[2]~reg0.CLK
clk_vga => ogreen[3]~reg0.CLK
clk_vga => ogreen[4]~reg0.CLK
clk_vga => ogreen[5]~reg0.CLK
clk_vga => ogreen[6]~reg0.CLK
clk_vga => ogreen[7]~reg0.CLK
clk_vga => ogreen[8]~reg0.CLK
clk_vga => ogreen[9]~reg0.CLK
clk_vga => ored[0]~reg0.CLK
clk_vga => ored[1]~reg0.CLK
clk_vga => ored[2]~reg0.CLK
clk_vga => ored[3]~reg0.CLK
clk_vga => ored[4]~reg0.CLK
clk_vga => ored[5]~reg0.CLK
clk_vga => ored[6]~reg0.CLK
clk_vga => ored[7]~reg0.CLK
clk_vga => ored[8]~reg0.CLK
clk_vga => ored[9]~reg0.CLK
clk_vga => row[0]~reg0.CLK
clk_vga => row[1]~reg0.CLK
clk_vga => row[2]~reg0.CLK
clk_vga => row[3]~reg0.CLK
clk_vga => row[4]~reg0.CLK
clk_vga => row[5]~reg0.CLK
clk_vga => row[6]~reg0.CLK
clk_vga => row[7]~reg0.CLK
clk_vga => row[8]~reg0.CLK
clk_vga => row[9]~reg0.CLK
clk_vga => row[10]~reg0.CLK
clk_vga => row[11]~reg0.CLK
clk_vga => row[12]~reg0.CLK
clk_vga => col[0]~reg0.CLK
clk_vga => col[1]~reg0.CLK
clk_vga => col[2]~reg0.CLK
clk_vga => col[3]~reg0.CLK
clk_vga => col[4]~reg0.CLK
clk_vga => col[5]~reg0.CLK
clk_vga => col[6]~reg0.CLK
clk_vga => col[7]~reg0.CLK
clk_vga => col[8]~reg0.CLK
clk_vga => col[9]~reg0.CLK
clk_vga => col[10]~reg0.CLK
clk_vga => col[11]~reg0.CLK
clk_vga => col[12]~reg0.CLK
reset_n => ovga_v_sync~reg0.ACLR
reset_n => ovga_h_sync~reg0.ACLR
reset_n => ovga_sync~reg0.ACLR
reset_n => ovga_blank~reg0.ACLR
reset_n => oblue[0]~reg0.ACLR
reset_n => oblue[1]~reg0.ACLR
reset_n => oblue[2]~reg0.ACLR
reset_n => oblue[3]~reg0.ACLR
reset_n => oblue[4]~reg0.ACLR
reset_n => oblue[5]~reg0.ACLR
reset_n => oblue[6]~reg0.ACLR
reset_n => oblue[7]~reg0.ACLR
reset_n => oblue[8]~reg0.ACLR
reset_n => oblue[9]~reg0.ACLR
reset_n => ogreen[0]~reg0.ACLR
reset_n => ogreen[1]~reg0.ACLR
reset_n => ogreen[2]~reg0.ACLR
reset_n => ogreen[3]~reg0.ACLR
reset_n => ogreen[4]~reg0.ACLR
reset_n => ogreen[5]~reg0.ACLR
reset_n => ogreen[6]~reg0.ACLR
reset_n => ogreen[7]~reg0.ACLR
reset_n => ogreen[8]~reg0.ACLR
reset_n => ogreen[9]~reg0.ACLR
reset_n => ored[0]~reg0.ACLR
reset_n => ored[1]~reg0.ACLR
reset_n => ored[2]~reg0.ACLR
reset_n => ored[3]~reg0.ACLR
reset_n => ored[4]~reg0.ACLR
reset_n => ored[5]~reg0.ACLR
reset_n => ored[6]~reg0.ACLR
reset_n => ored[7]~reg0.ACLR
reset_n => ored[8]~reg0.ACLR
reset_n => ored[9]~reg0.ACLR
reset_n => orequest~reg0.ACLR
reset_n => mVGA_V_SYNC.ACLR
reset_n => V_Cont[0].ACLR
reset_n => V_Cont[1].ACLR
reset_n => V_Cont[2].ACLR
reset_n => V_Cont[3].ACLR
reset_n => V_Cont[4].ACLR
reset_n => V_Cont[5].ACLR
reset_n => V_Cont[6].ACLR
reset_n => V_Cont[7].ACLR
reset_n => V_Cont[8].ACLR
reset_n => V_Cont[9].ACLR
reset_n => V_Cont[10].ACLR
reset_n => V_Cont[11].ACLR
reset_n => V_Cont[12].ACLR
reset_n => mVGA_H_SYNC.ACLR
reset_n => h_cont[0].ACLR
reset_n => h_cont[1].ACLR
reset_n => h_cont[2].ACLR
reset_n => h_cont[3].ACLR
reset_n => h_cont[4].ACLR
reset_n => h_cont[5].ACLR
reset_n => h_cont[6].ACLR
reset_n => h_cont[7].ACLR
reset_n => h_cont[8].ACLR
reset_n => h_cont[9].ACLR
reset_n => h_cont[10].ACLR
reset_n => h_cont[11].ACLR
reset_n => h_cont[12].ACLR


