{ "Info" "IQEXE_SEPARATOR" "" "*******************************************************************" {  } {  } 3 0 "*******************************************************************" 0 0 "Design Software" 0 -1 1651562381031 ""}
{ "Info" "IQEXE_START_BANNER_PRODUCT" "Analysis & Synthesis Quartus Prime " "Running Quartus Prime Analysis & Synthesis" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 20.1.0 Build 711 06/05/2020 SJ Standard Edition " "Version 20.1.0 Build 711 06/05/2020 SJ Standard Edition" {  } {  } 0 0 "%1!s!" 0 0 "Design Software" 0 -1 1651562381032 ""} { "Info" "IQEXE_START_BANNER_TIME" "Tue May 03 00:19:40 2022 " "Processing started: Tue May 03 00:19:40 2022" {  } {  } 0 0 "Processing started: %1!s!" 0 0 "Design Software" 0 -1 1651562381032 ""}  } {  } 4 0 "Running %2!s! %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1651562381032 ""}
{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_map --read_settings_files=on --write_settings_files=off vga_top -c vga_top " "Command: quartus_map --read_settings_files=on --write_settings_files=off vga_top -c vga_top" {  } {  } 0 0 "Command: %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1651562381032 ""}
{ "Warning" "WQCU_PARALLEL_USER_SHOULD_SPECIFY_NUM_PROC" "" "Number of processors has not been specified which may cause overloading on shared machines.  Set the global assignment NUM_PARALLEL_PROCESSORS in your QSF to an appropriate value for best performance." {  } {  } 0 18236 "Number of processors has not been specified which may cause overloading on shared machines.  Set the global assignment NUM_PARALLEL_PROCESSORS in your QSF to an appropriate value for best performance." 0 0 "Analysis & Synthesis" 0 -1 1651562381683 ""}
{ "Info" "IQCU_PARALLEL_AUTODETECT_MULTIPLE_PROCESSORS" "4 4 " "Parallel compilation is enabled and will use 4 of the 4 processors detected" {  } {  } 0 20030 "Parallel compilation is enabled and will use %1!i! of the %2!i! processors detected" 0 0 "Analysis & Synthesis" 0 -1 1651562381683 ""}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "vga_controller.v 1 1 " "Found 1 design units, including 1 entities, in source file vga_controller.v" { { "Info" "ISGN_ENTITY_NAME" "1 VGA_controller " "Found entity 1: VGA_controller" {  } { { "VGA_controller.v" "" { Text "C:/Users/ziyua/Downloads/lab4.vga_top/vga_top/VGA_controller.v" 43 -1 0 } }  } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1651562393082 ""}  } {  } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1651562393082 ""}
{ "Warning" "WVRFX_L2_VERI_INGORE_DANGLING_COMMA" "vga_top.v(186) " "Verilog HDL Module Instantiation warning at vga_top.v(186): ignored dangling comma in List of Port Connections" {  } { { "vga_top.v" "" { Text "C:/Users/ziyua/Downloads/lab4.vga_top/vga_top/vga_top.v" 186 0 0 } }  } 0 10275 "Verilog HDL Module Instantiation warning at %1!s!: ignored dangling comma in List of Port Connections" 0 0 "Analysis & Synthesis" 0 -1 1651562393085 ""}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "vga_top.v 1 1 " "Found 1 design units, including 1 entities, in source file vga_top.v" { { "Info" "ISGN_ENTITY_NAME" "1 vga_top " "Found entity 1: vga_top" {  } { { "vga_top.v" "" { Text "C:/Users/ziyua/Downloads/lab4.vga_top/vga_top/vga_top.v" 9 -1 0 } }  } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1651562393086 ""}  } {  } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1651562393086 ""}
{ "Info" "ISGN_START_ELABORATION_TOP" "vga_top " "Elaborating entity \"vga_top\" for the top level hierarchy" {  } {  } 0 12127 "Elaborating entity \"%1!s!\" for the top level hierarchy" 0 0 "Analysis & Synthesis" 0 -1 1651562393129 ""}
{ "Warning" "WVRFX_L2_VDB_DRIVERLESS_OUTPUT_PORT" "LEDR\[9..1\] vga_top.v(51) " "Output port \"LEDR\[9..1\]\" at vga_top.v(51) has no driver" {  } { { "vga_top.v" "" { Text "C:/Users/ziyua/Downloads/lab4.vga_top/vga_top/vga_top.v" 51 0 0 } }  } 0 10034 "Output port \"%1!s!\" at %2!s! has no driver" 0 0 "Analysis & Synthesis" 0 -1 1651562393133 "|vga_top"}
{ "Warning" "WVRFX_L2_VDB_DRIVERLESS_OUTPUT_PORT" "HEX0\[7..1\] vga_top.v(54) " "Output port \"HEX0\[7..1\]\" at vga_top.v(54) has no driver" {  } { { "vga_top.v" "" { Text "C:/Users/ziyua/Downloads/lab4.vga_top/vga_top/vga_top.v" 54 0 0 } }  } 0 10034 "Output port \"%1!s!\" at %2!s! has no driver" 0 0 "Analysis & Synthesis" 0 -1 1651562393133 "|vga_top"}
{ "Warning" "WVRFX_L2_VDB_DRIVERLESS_OUTPUT_PORT" "HEX1 vga_top.v(55) " "Output port \"HEX1\" at vga_top.v(55) has no driver" {  } { { "vga_top.v" "" { Text "C:/Users/ziyua/Downloads/lab4.vga_top/vga_top/vga_top.v" 55 0 0 } }  } 0 10034 "Output port \"%1!s!\" at %2!s! has no driver" 0 0 "Analysis & Synthesis" 0 -1 1651562393133 "|vga_top"}
{ "Warning" "WVRFX_L2_VDB_DRIVERLESS_OUTPUT_PORT" "HEX2 vga_top.v(56) " "Output port \"HEX2\" at vga_top.v(56) has no driver" {  } { { "vga_top.v" "" { Text "C:/Users/ziyua/Downloads/lab4.vga_top/vga_top/vga_top.v" 56 0 0 } }  } 0 10034 "Output port \"%1!s!\" at %2!s! has no driver" 0 0 "Analysis & Synthesis" 0 -1 1651562393133 "|vga_top"}
{ "Warning" "WVRFX_L2_VDB_DRIVERLESS_OUTPUT_PORT" "HEX3 vga_top.v(57) " "Output port \"HEX3\" at vga_top.v(57) has no driver" {  } { { "vga_top.v" "" { Text "C:/Users/ziyua/Downloads/lab4.vga_top/vga_top/vga_top.v" 57 0 0 } }  } 0 10034 "Output port \"%1!s!\" at %2!s! has no driver" 0 0 "Analysis & Synthesis" 0 -1 1651562393133 "|vga_top"}
{ "Warning" "WVRFX_L2_VDB_DRIVERLESS_OUTPUT_PORT" "HEX4 vga_top.v(58) " "Output port \"HEX4\" at vga_top.v(58) has no driver" {  } { { "vga_top.v" "" { Text "C:/Users/ziyua/Downloads/lab4.vga_top/vga_top/vga_top.v" 58 0 0 } }  } 0 10034 "Output port \"%1!s!\" at %2!s! has no driver" 0 0 "Analysis & Synthesis" 0 -1 1651562393133 "|vga_top"}
{ "Warning" "WVRFX_L2_VDB_DRIVERLESS_OUTPUT_PORT" "HEX5 vga_top.v(59) " "Output port \"HEX5\" at vga_top.v(59) has no driver" {  } { { "vga_top.v" "" { Text "C:/Users/ziyua/Downloads/lab4.vga_top/vga_top/vga_top.v" 59 0 0 } }  } 0 10034 "Output port \"%1!s!\" at %2!s! has no driver" 0 0 "Analysis & Synthesis" 0 -1 1651562393133 "|vga_top"}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "VGA_controller VGA_controller:vga_control " "Elaborating entity \"VGA_controller\" for hierarchy \"VGA_controller:vga_control\"" {  } { { "vga_top.v" "vga_control" { Text "C:/Users/ziyua/Downloads/lab4.vga_top/vga_top/vga_top.v" 186 0 0 } }  } 0 12128 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1651562393157 ""}
{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 10 VGA_controller.v(111) " "Verilog HDL assignment warning at VGA_controller.v(111): truncated value with size 32 to match size of target (10)" {  } { { "VGA_controller.v" "" { Text "C:/Users/ziyua/Downloads/lab4.vga_top/vga_top/VGA_controller.v" 111 0 0 } }  } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "Analysis & Synthesis" 0 -1 1651562393159 "|vga_top|VGA_controller:vga_control"}
{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 10 VGA_controller.v(114) " "Verilog HDL assignment warning at VGA_controller.v(114): truncated value with size 32 to match size of target (10)" {  } { { "VGA_controller.v" "" { Text "C:/Users/ziyua/Downloads/lab4.vga_top/vga_top/VGA_controller.v" 114 0 0 } }  } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "Analysis & Synthesis" 0 -1 1651562393160 "|vga_top|VGA_controller:vga_control"}
{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 10 VGA_controller.v(117) " "Verilog HDL assignment warning at VGA_controller.v(117): truncated value with size 32 to match size of target (10)" {  } { { "VGA_controller.v" "" { Text "C:/Users/ziyua/Downloads/lab4.vga_top/vga_top/VGA_controller.v" 117 0 0 } }  } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "Analysis & Synthesis" 0 -1 1651562393160 "|vga_top|VGA_controller:vga_control"}
{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 13 VGA_controller.v(123) " "Verilog HDL assignment warning at VGA_controller.v(123): truncated value with size 32 to match size of target (13)" {  } { { "VGA_controller.v" "" { Text "C:/Users/ziyua/Downloads/lab4.vga_top/vga_top/VGA_controller.v" 123 0 0 } }  } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "Analysis & Synthesis" 0 -1 1651562393160 "|vga_top|VGA_controller:vga_control"}
{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 13 VGA_controller.v(124) " "Verilog HDL assignment warning at VGA_controller.v(124): truncated value with size 32 to match size of target (13)" {  } { { "VGA_controller.v" "" { Text "C:/Users/ziyua/Downloads/lab4.vga_top/vga_top/VGA_controller.v" 124 0 0 } }  } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "Analysis & Synthesis" 0 -1 1651562393160 "|vga_top|VGA_controller:vga_control"}
{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 13 VGA_controller.v(181) " "Verilog HDL assignment warning at VGA_controller.v(181): truncated value with size 32 to match size of target (13)" {  } { { "VGA_controller.v" "" { Text "C:/Users/ziyua/Downloads/lab4.vga_top/vga_top/VGA_controller.v" 181 0 0 } }  } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "Analysis & Synthesis" 0 -1 1651562393160 "|vga_top|VGA_controller:vga_control"}
{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 13 VGA_controller.v(207) " "Verilog HDL assignment warning at VGA_controller.v(207): truncated value with size 32 to match size of target (13)" {  } { { "VGA_controller.v" "" { Text "C:/Users/ziyua/Downloads/lab4.vga_top/vga_top/VGA_controller.v" 207 0 0 } }  } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "Analysis & Synthesis" 0 -1 1651562393160 "|vga_top|VGA_controller:vga_control"}
{ "Warning" "WSGN_CONNECTIVITY_WARNINGS" "1 " "1 hierarchies have connectivity warnings - see the Connectivity Checks report folder" {  } {  } 0 12241 "%1!d! hierarchies have connectivity warnings - see the Connectivity Checks report folder" 0 0 "Analysis & Synthesis" 0 -1 1651562393785 ""}
{ "Warning" "WMLS_MLS_STUCK_PIN_HDR" "" "Output pins are stuck at VCC or GND" { { "Warning" "WMLS_MLS_STUCK_PIN" "LEDR\[1\] GND " "Pin \"LEDR\[1\]\" is stuck at GND" {  } { { "vga_top.v" "" { Text "C:/Users/ziyua/Downloads/lab4.vga_top/vga_top/vga_top.v" 51 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1651562393854 "|vga_top|LEDR[1]"} { "Warning" "WMLS_MLS_STUCK_PIN" "LEDR\[2\] GND " "Pin \"LEDR\[2\]\" is stuck at GND" {  } { { "vga_top.v" "" { Text "C:/Users/ziyua/Downloads/lab4.vga_top/vga_top/vga_top.v" 51 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1651562393854 "|vga_top|LEDR[2]"} { "Warning" "WMLS_MLS_STUCK_PIN" "LEDR\[3\] GND " "Pin \"LEDR\[3\]\" is stuck at GND" {  } { { "vga_top.v" "" { Text "C:/Users/ziyua/Downloads/lab4.vga_top/vga_top/vga_top.v" 51 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1651562393854 "|vga_top|LEDR[3]"} { "Warning" "WMLS_MLS_STUCK_PIN" "LEDR\[4\] GND " "Pin \"LEDR\[4\]\" is stuck at GND" {  } { { "vga_top.v" "" { Text "C:/Users/ziyua/Downloads/lab4.vga_top/vga_top/vga_top.v" 51 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1651562393854 "|vga_top|LEDR[4]"} { "Warning" "WMLS_MLS_STUCK_PIN" "LEDR\[5\] GND " "Pin \"LEDR\[5\]\" is stuck at GND" {  } { { "vga_top.v" "" { Text "C:/Users/ziyua/Downloads/lab4.vga_top/vga_top/vga_top.v" 51 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1651562393854 "|vga_top|LEDR[5]"} { "Warning" "WMLS_MLS_STUCK_PIN" "LEDR\[6\] GND " "Pin \"LEDR\[6\]\" is stuck at GND" {  } { { "vga_top.v" "" { Text "C:/Users/ziyua/Downloads/lab4.vga_top/vga_top/vga_top.v" 51 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1651562393854 "|vga_top|LEDR[6]"} { "Warning" "WMLS_MLS_STUCK_PIN" "LEDR\[7\] GND " "Pin \"LEDR\[7\]\" is stuck at GND" {  } { { "vga_top.v" "" { Text "C:/Users/ziyua/Downloads/lab4.vga_top/vga_top/vga_top.v" 51 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1651562393854 "|vga_top|LEDR[7]"} { "Warning" "WMLS_MLS_STUCK_PIN" "LEDR\[8\] GND " "Pin \"LEDR\[8\]\" is stuck at GND" {  } { { "vga_top.v" "" { Text "C:/Users/ziyua/Downloads/lab4.vga_top/vga_top/vga_top.v" 51 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1651562393854 "|vga_top|LEDR[8]"} { "Warning" "WMLS_MLS_STUCK_PIN" "LEDR\[9\] GND " "Pin \"LEDR\[9\]\" is stuck at GND" {  } { { "vga_top.v" "" { Text "C:/Users/ziyua/Downloads/lab4.vga_top/vga_top/vga_top.v" 51 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1651562393854 "|vga_top|LEDR[9]"} { "Warning" "WMLS_MLS_STUCK_PIN" "HEX0\[1\] GND " "Pin \"HEX0\[1\]\" is stuck at GND" {  } { { "vga_top.v" "" { Text "C:/Users/ziyua/Downloads/lab4.vga_top/vga_top/vga_top.v" 54 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1651562393854 "|vga_top|HEX0[1]"} { "Warning" "WMLS_MLS_STUCK_PIN" "HEX0\[2\] GND " "Pin \"HEX0\[2\]\" is stuck at GND" {  } { { "vga_top.v" "" { Text "C:/Users/ziyua/Downloads/lab4.vga_top/vga_top/vga_top.v" 54 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1651562393854 "|vga_top|HEX0[2]"} { "Warning" "WMLS_MLS_STUCK_PIN" "HEX0\[3\] GND " "Pin \"HEX0\[3\]\" is stuck at GND" {  } { { "vga_top.v" "" { Text "C:/Users/ziyua/Downloads/lab4.vga_top/vga_top/vga_top.v" 54 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1651562393854 "|vga_top|HEX0[3]"} { "Warning" "WMLS_MLS_STUCK_PIN" "HEX0\[4\] GND " "Pin \"HEX0\[4\]\" is stuck at GND" {  } { { "vga_top.v" "" { Text "C:/Users/ziyua/Downloads/lab4.vga_top/vga_top/vga_top.v" 54 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1651562393854 "|vga_top|HEX0[4]"} { "Warning" "WMLS_MLS_STUCK_PIN" "HEX0\[5\] GND " "Pin \"HEX0\[5\]\" is stuck at GND" {  } { { "vga_top.v" "" { Text "C:/Users/ziyua/Downloads/lab4.vga_top/vga_top/vga_top.v" 54 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1651562393854 "|vga_top|HEX0[5]"} { "Warning" "WMLS_MLS_STUCK_PIN" "HEX0\[6\] GND " "Pin \"HEX0\[6\]\" is stuck at GND" {  } { { "vga_top.v" "" { Text "C:/Users/ziyua/Downloads/lab4.vga_top/vga_top/vga_top.v" 54 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1651562393854 "|vga_top|HEX0[6]"} { "Warning" "WMLS_MLS_STUCK_PIN" "HEX0\[7\] GND " "Pin \"HEX0\[7\]\" is stuck at GND" {  } { { "vga_top.v" "" { Text "C:/Users/ziyua/Downloads/lab4.vga_top/vga_top/vga_top.v" 54 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1651562393854 "|vga_top|HEX0[7]"} { "Warning" "WMLS_MLS_STUCK_PIN" "HEX1\[0\] GND " "Pin \"HEX1\[0\]\" is stuck at GND" {  } { { "vga_top.v" "" { Text "C:/Users/ziyua/Downloads/lab4.vga_top/vga_top/vga_top.v" 55 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1651562393854 "|vga_top|HEX1[0]"} { "Warning" "WMLS_MLS_STUCK_PIN" "HEX1\[1\] GND " "Pin \"HEX1\[1\]\" is stuck at GND" {  } { { "vga_top.v" "" { Text "C:/Users/ziyua/Downloads/lab4.vga_top/vga_top/vga_top.v" 55 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1651562393854 "|vga_top|HEX1[1]"} { "Warning" "WMLS_MLS_STUCK_PIN" "HEX1\[2\] GND " "Pin \"HEX1\[2\]\" is stuck at GND" {  } { { "vga_top.v" "" { Text "C:/Users/ziyua/Downloads/lab4.vga_top/vga_top/vga_top.v" 55 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1651562393854 "|vga_top|HEX1[2]"} { "Warning" "WMLS_MLS_STUCK_PIN" "HEX1\[3\] GND " "Pin \"HEX1\[3\]\" is stuck at GND" {  } { { "vga_top.v" "" { Text "C:/Users/ziyua/Downloads/lab4.vga_top/vga_top/vga_top.v" 55 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1651562393854 "|vga_top|HEX1[3]"} { "Warning" "WMLS_MLS_STUCK_PIN" "HEX1\[4\] GND " "Pin \"HEX1\[4\]\" is stuck at GND" {  } { { "vga_top.v" "" { Text "C:/Users/ziyua/Downloads/lab4.vga_top/vga_top/vga_top.v" 55 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1651562393854 "|vga_top|HEX1[4]"} { "Warning" "WMLS_MLS_STUCK_PIN" "HEX1\[5\] GND " "Pin \"HEX1\[5\]\" is stuck at GND" {  } { { "vga_top.v" "" { Text "C:/Users/ziyua/Downloads/lab4.vga_top/vga_top/vga_top.v" 55 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1651562393854 "|vga_top|HEX1[5]"} { "Warning" "WMLS_MLS_STUCK_PIN" "HEX1\[6\] GND " "Pin \"HEX1\[6\]\" is stuck at GND" {  } { { "vga_top.v" "" { Text "C:/Users/ziyua/Downloads/lab4.vga_top/vga_top/vga_top.v" 55 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1651562393854 "|vga_top|HEX1[6]"} { "Warning" "WMLS_MLS_STUCK_PIN" "HEX1\[7\] GND " "Pin \"HEX1\[7\]\" is stuck at GND" {  } { { "vga_top.v" "" { Text "C:/Users/ziyua/Downloads/lab4.vga_top/vga_top/vga_top.v" 55 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1651562393854 "|vga_top|HEX1[7]"} { "Warning" "WMLS_MLS_STUCK_PIN" "HEX2\[0\] GND " "Pin \"HEX2\[0\]\" is stuck at GND" {  } { { "vga_top.v" "" { Text "C:/Users/ziyua/Downloads/lab4.vga_top/vga_top/vga_top.v" 56 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1651562393854 "|vga_top|HEX2[0]"} { "Warning" "WMLS_MLS_STUCK_PIN" "HEX2\[1\] GND " "Pin \"HEX2\[1\]\" is stuck at GND" {  } { { "vga_top.v" "" { Text "C:/Users/ziyua/Downloads/lab4.vga_top/vga_top/vga_top.v" 56 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1651562393854 "|vga_top|HEX2[1]"} { "Warning" "WMLS_MLS_STUCK_PIN" "HEX2\[2\] GND " "Pin \"HEX2\[2\]\" is stuck at GND" {  } { { "vga_top.v" "" { Text "C:/Users/ziyua/Downloads/lab4.vga_top/vga_top/vga_top.v" 56 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1651562393854 "|vga_top|HEX2[2]"} { "Warning" "WMLS_MLS_STUCK_PIN" "HEX2\[3\] GND " "Pin \"HEX2\[3\]\" is stuck at GND" {  } { { "vga_top.v" "" { Text "C:/Users/ziyua/Downloads/lab4.vga_top/vga_top/vga_top.v" 56 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1651562393854 "|vga_top|HEX2[3]"} { "Warning" "WMLS_MLS_STUCK_PIN" "HEX2\[4\] GND " "Pin \"HEX2\[4\]\" is stuck at GND" {  } { { "vga_top.v" "" { Text "C:/Users/ziyua/Downloads/lab4.vga_top/vga_top/vga_top.v" 56 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1651562393854 "|vga_top|HEX2[4]"} { "Warning" "WMLS_MLS_STUCK_PIN" "HEX2\[5\] GND " "Pin \"HEX2\[5\]\" is stuck at GND" {  } { { "vga_top.v" "" { Text "C:/Users/ziyua/Downloads/lab4.vga_top/vga_top/vga_top.v" 56 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1651562393854 "|vga_top|HEX2[5]"} { "Warning" "WMLS_MLS_STUCK_PIN" "HEX2\[6\] GND " "Pin \"HEX2\[6\]\" is stuck at GND" {  } { { "vga_top.v" "" { Text "C:/Users/ziyua/Downloads/lab4.vga_top/vga_top/vga_top.v" 56 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1651562393854 "|vga_top|HEX2[6]"} { "Warning" "WMLS_MLS_STUCK_PIN" "HEX2\[7\] GND " "Pin \"HEX2\[7\]\" is stuck at GND" {  } { { "vga_top.v" "" { Text "C:/Users/ziyua/Downloads/lab4.vga_top/vga_top/vga_top.v" 56 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1651562393854 "|vga_top|HEX2[7]"} { "Warning" "WMLS_MLS_STUCK_PIN" "HEX3\[0\] GND " "Pin \"HEX3\[0\]\" is stuck at GND" {  } { { "vga_top.v" "" { Text "C:/Users/ziyua/Downloads/lab4.vga_top/vga_top/vga_top.v" 57 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1651562393854 "|vga_top|HEX3[0]"} { "Warning" "WMLS_MLS_STUCK_PIN" "HEX3\[1\] GND " "Pin \"HEX3\[1\]\" is stuck at GND" {  } { { "vga_top.v" "" { Text "C:/Users/ziyua/Downloads/lab4.vga_top/vga_top/vga_top.v" 57 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1651562393854 "|vga_top|HEX3[1]"} { "Warning" "WMLS_MLS_STUCK_PIN" "HEX3\[2\] GND " "Pin \"HEX3\[2\]\" is stuck at GND" {  } { { "vga_top.v" "" { Text "C:/Users/ziyua/Downloads/lab4.vga_top/vga_top/vga_top.v" 57 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1651562393854 "|vga_top|HEX3[2]"} { "Warning" "WMLS_MLS_STUCK_PIN" "HEX3\[3\] GND " "Pin \"HEX3\[3\]\" is stuck at GND" {  } { { "vga_top.v" "" { Text "C:/Users/ziyua/Downloads/lab4.vga_top/vga_top/vga_top.v" 57 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1651562393854 "|vga_top|HEX3[3]"} { "Warning" "WMLS_MLS_STUCK_PIN" "HEX3\[4\] GND " "Pin \"HEX3\[4\]\" is stuck at GND" {  } { { "vga_top.v" "" { Text "C:/Users/ziyua/Downloads/lab4.vga_top/vga_top/vga_top.v" 57 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1651562393854 "|vga_top|HEX3[4]"} { "Warning" "WMLS_MLS_STUCK_PIN" "HEX3\[5\] GND " "Pin \"HEX3\[5\]\" is stuck at GND" {  } { { "vga_top.v" "" { Text "C:/Users/ziyua/Downloads/lab4.vga_top/vga_top/vga_top.v" 57 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1651562393854 "|vga_top|HEX3[5]"} { "Warning" "WMLS_MLS_STUCK_PIN" "HEX3\[6\] GND " "Pin \"HEX3\[6\]\" is stuck at GND" {  } { { "vga_top.v" "" { Text "C:/Users/ziyua/Downloads/lab4.vga_top/vga_top/vga_top.v" 57 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1651562393854 "|vga_top|HEX3[6]"} { "Warning" "WMLS_MLS_STUCK_PIN" "HEX3\[7\] GND " "Pin \"HEX3\[7\]\" is stuck at GND" {  } { { "vga_top.v" "" { Text "C:/Users/ziyua/Downloads/lab4.vga_top/vga_top/vga_top.v" 57 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1651562393854 "|vga_top|HEX3[7]"} { "Warning" "WMLS_MLS_STUCK_PIN" "HEX4\[0\] GND " "Pin \"HEX4\[0\]\" is stuck at GND" {  } { { "vga_top.v" "" { Text "C:/Users/ziyua/Downloads/lab4.vga_top/vga_top/vga_top.v" 58 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1651562393854 "|vga_top|HEX4[0]"} { "Warning" "WMLS_MLS_STUCK_PIN" "HEX4\[1\] GND " "Pin \"HEX4\[1\]\" is stuck at GND" {  } { { "vga_top.v" "" { Text "C:/Users/ziyua/Downloads/lab4.vga_top/vga_top/vga_top.v" 58 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1651562393854 "|vga_top|HEX4[1]"} { "Warning" "WMLS_MLS_STUCK_PIN" "HEX4\[2\] GND " "Pin \"HEX4\[2\]\" is stuck at GND" {  } { { "vga_top.v" "" { Text "C:/Users/ziyua/Downloads/lab4.vga_top/vga_top/vga_top.v" 58 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1651562393854 "|vga_top|HEX4[2]"} { "Warning" "WMLS_MLS_STUCK_PIN" "HEX4\[3\] GND " "Pin \"HEX4\[3\]\" is stuck at GND" {  } { { "vga_top.v" "" { Text "C:/Users/ziyua/Downloads/lab4.vga_top/vga_top/vga_top.v" 58 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1651562393854 "|vga_top|HEX4[3]"} { "Warning" "WMLS_MLS_STUCK_PIN" "HEX4\[4\] GND " "Pin \"HEX4\[4\]\" is stuck at GND" {  } { { "vga_top.v" "" { Text "C:/Users/ziyua/Downloads/lab4.vga_top/vga_top/vga_top.v" 58 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1651562393854 "|vga_top|HEX4[4]"} { "Warning" "WMLS_MLS_STUCK_PIN" "HEX4\[5\] GND " "Pin \"HEX4\[5\]\" is stuck at GND" {  } { { "vga_top.v" "" { Text "C:/Users/ziyua/Downloads/lab4.vga_top/vga_top/vga_top.v" 58 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1651562393854 "|vga_top|HEX4[5]"} { "Warning" "WMLS_MLS_STUCK_PIN" "HEX4\[6\] GND " "Pin \"HEX4\[6\]\" is stuck at GND" {  } { { "vga_top.v" "" { Text "C:/Users/ziyua/Downloads/lab4.vga_top/vga_top/vga_top.v" 58 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1651562393854 "|vga_top|HEX4[6]"} { "Warning" "WMLS_MLS_STUCK_PIN" "HEX4\[7\] GND " "Pin \"HEX4\[7\]\" is stuck at GND" {  } { { "vga_top.v" "" { Text "C:/Users/ziyua/Downloads/lab4.vga_top/vga_top/vga_top.v" 58 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1651562393854 "|vga_top|HEX4[7]"} { "Warning" "WMLS_MLS_STUCK_PIN" "HEX5\[0\] GND " "Pin \"HEX5\[0\]\" is stuck at GND" {  } { { "vga_top.v" "" { Text "C:/Users/ziyua/Downloads/lab4.vga_top/vga_top/vga_top.v" 59 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1651562393854 "|vga_top|HEX5[0]"} { "Warning" "WMLS_MLS_STUCK_PIN" "HEX5\[1\] GND " "Pin \"HEX5\[1\]\" is stuck at GND" {  } { { "vga_top.v" "" { Text "C:/Users/ziyua/Downloads/lab4.vga_top/vga_top/vga_top.v" 59 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1651562393854 "|vga_top|HEX5[1]"} { "Warning" "WMLS_MLS_STUCK_PIN" "HEX5\[2\] GND " "Pin \"HEX5\[2\]\" is stuck at GND" {  } { { "vga_top.v" "" { Text "C:/Users/ziyua/Downloads/lab4.vga_top/vga_top/vga_top.v" 59 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1651562393854 "|vga_top|HEX5[2]"} { "Warning" "WMLS_MLS_STUCK_PIN" "HEX5\[3\] GND " "Pin \"HEX5\[3\]\" is stuck at GND" {  } { { "vga_top.v" "" { Text "C:/Users/ziyua/Downloads/lab4.vga_top/vga_top/vga_top.v" 59 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1651562393854 "|vga_top|HEX5[3]"} { "Warning" "WMLS_MLS_STUCK_PIN" "HEX5\[4\] GND " "Pin \"HEX5\[4\]\" is stuck at GND" {  } { { "vga_top.v" "" { Text "C:/Users/ziyua/Downloads/lab4.vga_top/vga_top/vga_top.v" 59 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1651562393854 "|vga_top|HEX5[4]"} { "Warning" "WMLS_MLS_STUCK_PIN" "HEX5\[5\] GND " "Pin \"HEX5\[5\]\" is stuck at GND" {  } { { "vga_top.v" "" { Text "C:/Users/ziyua/Downloads/lab4.vga_top/vga_top/vga_top.v" 59 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1651562393854 "|vga_top|HEX5[5]"} { "Warning" "WMLS_MLS_STUCK_PIN" "HEX5\[6\] GND " "Pin \"HEX5\[6\]\" is stuck at GND" {  } { { "vga_top.v" "" { Text "C:/Users/ziyua/Downloads/lab4.vga_top/vga_top/vga_top.v" 59 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1651562393854 "|vga_top|HEX5[6]"} { "Warning" "WMLS_MLS_STUCK_PIN" "HEX5\[7\] GND " "Pin \"HEX5\[7\]\" is stuck at GND" {  } { { "vga_top.v" "" { Text "C:/Users/ziyua/Downloads/lab4.vga_top/vga_top/vga_top.v" 59 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1651562393854 "|vga_top|HEX5[7]"} { "Warning" "WMLS_MLS_STUCK_PIN" "VGA_SYNC_N GND " "Pin \"VGA_SYNC_N\" is stuck at GND" {  } { { "vga_top.v" "" { Text "C:/Users/ziyua/Downloads/lab4.vga_top/vga_top/vga_top.v" 67 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1651562393854 "|vga_top|VGA_SYNC_N"}  } {  } 0 13024 "Output pins are stuck at VCC or GND" 0 0 "Analysis & Synthesis" 0 -1 1651562393854 ""}
{ "Info" "ISUTIL_TIMING_DRIVEN_SYNTHESIS_RUNNING" "" "Timing-Driven Synthesis is running" {  } {  } 0 286030 "Timing-Driven Synthesis is running" 0 0 "Analysis & Synthesis" 0 -1 1651562393954 ""}
{ "Info" "ISCL_SCL_LOST_FANOUT_MSG_HDR" "3 " "3 registers lost all their fanouts during netlist optimizations." {  } {  } 0 17049 "%1!d! registers lost all their fanouts during netlist optimizations." 0 0 "Analysis & Synthesis" 0 -1 1651562394250 ""}
{ "Warning" "WQCU_FOUND_UNUSABLE_ASSIGNMENTS_FOR_ENTITY" "vga 24 " "Ignored 24 assignments for entity \"vga\" -- entity does not exist in design" { { "Warning" "WQCU_IGNORED_ENTITY_ASSIGNMENT" "set_instance_assignment -name PARTITION_HIERARCHY root_partition -to \| -entity vga -section_id Top " "Assignment for entity set_instance_assignment -name PARTITION_HIERARCHY root_partition -to \| -entity vga -section_id Top was ignored" {  } {  } 0 20014 "Assignment for entity %1!s! was ignored" 0 0 "Design Software" 0 -1 1651562394263 ""} { "Warning" "WQCU_IGNORED_ENTITY_ASSIGNMENT" "set_global_assignment -name PARTITION_NETLIST_TYPE SOURCE -entity vga -section_id Top " "Assignment for entity set_global_assignment -name PARTITION_NETLIST_TYPE SOURCE -entity vga -section_id Top was ignored" {  } {  } 0 20014 "Assignment for entity %1!s! was ignored" 0 0 "Design Software" 0 -1 1651562394263 ""} { "Warning" "WQCU_IGNORED_ENTITY_ASSIGNMENT" "set_global_assignment -name PARTITION_FITTER_PRESERVATION_LEVEL PLACEMENT_AND_ROUTING -entity vga -section_id Top " "Assignment for entity set_global_assignment -name PARTITION_FITTER_PRESERVATION_LEVEL PLACEMENT_AND_ROUTING -entity vga -section_id Top was ignored" {  } {  } 0 20014 "Assignment for entity %1!s! was ignored" 0 0 "Design Software" 0 -1 1651562394263 ""} { "Warning" "WQCU_IGNORED_ENTITY_ASSIGNMENT" "set_global_assignment -name PARTITION_PRESERVE_HIGH_SPEED_TILES ON -entity vga -section_id Top " "Assignment for entity set_global_assignment -name PARTITION_PRESERVE_HIGH_SPEED_TILES ON -entity vga -section_id Top was ignored" {  } {  } 0 20014 "Assignment for entity %1!s! was ignored" 0 0 "Design Software" 0 -1 1651562394263 ""} { "Warning" "WQCU_IGNORED_ENTITY_ASSIGNMENT" "set_global_assignment -name PARTITION_IGNORE_SOURCE_FILE_CHANGES OFF -entity vga -section_id Top " "Assignment for entity set_global_assignment -name PARTITION_IGNORE_SOURCE_FILE_CHANGES OFF -entity vga -section_id Top was ignored" {  } {  } 0 20014 "Assignment for entity %1!s! was ignored" 0 0 "Design Software" 0 -1 1651562394263 ""} { "Warning" "WQCU_IGNORED_ENTITY_ASSIGNMENT" "set_global_assignment -name PARTITION_ALWAYS_USE_QXP_NETLIST OFF -entity vga -section_id Top " "Assignment for entity set_global_assignment -name PARTITION_ALWAYS_USE_QXP_NETLIST OFF -entity vga -section_id Top was ignored" {  } {  } 0 20014 "Assignment for entity %1!s! was ignored" 0 0 "Design Software" 0 -1 1651562394263 ""} { "Warning" "WQCU_IGNORED_ENTITY_ASSIGNMENT" "set_global_assignment -name PARTITION_COLOR 16764057 -entity vga -section_id Top " "Assignment for entity set_global_assignment -name PARTITION_COLOR 16764057 -entity vga -section_id Top was ignored" {  } {  } 0 20014 "Assignment for entity %1!s! was ignored" 0 0 "Design Software" 0 -1 1651562394263 ""} { "Warning" "WQCU_IGNORED_ENTITY_ASSIGNMENT" "set_global_assignment -name PARTITION_IMPORT_ASSIGNMENTS ON -entity vga -section_id Top " "Assignment for entity set_global_assignment -name PARTITION_IMPORT_ASSIGNMENTS ON -entity vga -section_id Top was ignored" {  } {  } 0 20014 "Assignment for entity %1!s! was ignored" 0 0 "Design Software" 0 -1 1651562394263 ""} { "Warning" "WQCU_IGNORED_ENTITY_ASSIGNMENT" "set_global_assignment -name PARTITION_IMPORT_EXISTING_ASSIGNMENTS REPLACE_CONFLICTING -entity vga -section_id Top " "Assignment for entity set_global_assignment -name PARTITION_IMPORT_EXISTING_ASSIGNMENTS REPLACE_CONFLICTING -entity vga -section_id Top was ignored" {  } {  } 0 20014 "Assignment for entity %1!s! was ignored" 0 0 "Design Software" 0 -1 1651562394263 ""} { "Warning" "WQCU_IGNORED_ENTITY_ASSIGNMENT" "set_global_assignment -name PARTITION_IMPORT_EXISTING_LOGICLOCK_REGIONS UPDATE_CONFLICTING -entity vga -section_id Top " "Assignment for entity set_global_assignment -name PARTITION_IMPORT_EXISTING_LOGICLOCK_REGIONS UPDATE_CONFLICTING -entity vga -section_id Top was ignored" {  } {  } 0 20014 "Assignment for entity %1!s! was ignored" 0 0 "Design Software" 0 -1 1651562394263 ""} { "Warning" "WQCU_IGNORED_ENTITY_ASSIGNMENT" "set_global_assignment -name PARTITION_IMPORT_PIN_ASSIGNMENTS ON -entity vga -section_id Top " "Assignment for entity set_global_assignment -name PARTITION_IMPORT_PIN_ASSIGNMENTS ON -entity vga -section_id Top was ignored" {  } {  } 0 20014 "Assignment for entity %1!s! was ignored" 0 0 "Design Software" 0 -1 1651562394263 ""} { "Warning" "WQCU_IGNORED_ENTITY_ASSIGNMENT" "set_global_assignment -name PARTITION_IMPORT_PROMOTE_ASSIGNMENTS ON -entity vga -section_id Top " "Assignment for entity set_global_assignment -name PARTITION_IMPORT_PROMOTE_ASSIGNMENTS ON -entity vga -section_id Top was ignored" {  } {  } 0 20014 "Assignment for entity %1!s! was ignored" 0 0 "Design Software" 0 -1 1651562394263 ""} { "Warning" "WQCU_IGNORED_ENTITY_ASSIGNMENT" "set_global_assignment -name PARTITION_TYPE STANDARD_PARTITION -entity vga -section_id Top " "Assignment for entity set_global_assignment -name PARTITION_TYPE STANDARD_PARTITION -entity vga -section_id Top was ignored" {  } {  } 0 20014 "Assignment for entity %1!s! was ignored" 0 0 "Design Software" 0 -1 1651562394263 ""} { "Warning" "WQCU_IGNORED_ENTITY_ASSIGNMENT" "set_global_assignment -name ALLOW_MULTIPLE_PERSONAS OFF -entity vga -section_id Top " "Assignment for entity set_global_assignment -name ALLOW_MULTIPLE_PERSONAS OFF -entity vga -section_id Top was ignored" {  } {  } 0 20014 "Assignment for entity %1!s! was ignored" 0 0 "Design Software" 0 -1 1651562394263 ""} { "Warning" "WQCU_IGNORED_ENTITY_ASSIGNMENT" "set_global_assignment -name PARTITION_ASD_REGION_ID 1 -entity vga -section_id Top " "Assignment for entity set_global_assignment -name PARTITION_ASD_REGION_ID 1 -entity vga -section_id Top was ignored" {  } {  } 0 20014 "Assignment for entity %1!s! was ignored" 0 0 "Design Software" 0 -1 1651562394263 ""} { "Warning" "WQCU_IGNORED_ENTITY_ASSIGNMENT" "set_global_assignment -name CROSS_BOUNDARY_OPTIMIZATIONS OFF -entity vga -section_id Top " "Assignment for entity set_global_assignment -name CROSS_BOUNDARY_OPTIMIZATIONS OFF -entity vga -section_id Top was ignored" {  } {  } 0 20014 "Assignment for entity %1!s! was ignored" 0 0 "Design Software" 0 -1 1651562394263 ""} { "Warning" "WQCU_IGNORED_ENTITY_ASSIGNMENT" "set_global_assignment -name PROPAGATE_CONSTANTS_ON_INPUTS ON -entity vga -section_id Top " "Assignment for entity set_global_assignment -name PROPAGATE_CONSTANTS_ON_INPUTS ON -entity vga -section_id Top was ignored" {  } {  } 0 20014 "Assignment for entity %1!s! was ignored" 0 0 "Design Software" 0 -1 1651562394263 ""} { "Warning" "WQCU_IGNORED_ENTITY_ASSIGNMENT" "set_global_assignment -name PROPAGATE_INVERSIONS_ON_INPUTS ON -entity vga -section_id Top " "Assignment for entity set_global_assignment -name PROPAGATE_INVERSIONS_ON_INPUTS ON -entity vga -section_id Top was ignored" {  } {  } 0 20014 "Assignment for entity %1!s! was ignored" 0 0 "Design Software" 0 -1 1651562394263 ""} { "Warning" "WQCU_IGNORED_ENTITY_ASSIGNMENT" "set_global_assignment -name REMOVE_LOGIC_ON_UNCONNECTED_OUTPUTS ON -entity vga -section_id Top " "Assignment for entity set_global_assignment -name REMOVE_LOGIC_ON_UNCONNECTED_OUTPUTS ON -entity vga -section_id Top was ignored" {  } {  } 0 20014 "Assignment for entity %1!s! was ignored" 0 0 "Design Software" 0 -1 1651562394263 ""} { "Warning" "WQCU_IGNORED_ENTITY_ASSIGNMENT" "set_global_assignment -name MERGE_EQUIVALENT_INPUTS ON -entity vga -section_id Top " "Assignment for entity set_global_assignment -name MERGE_EQUIVALENT_INPUTS ON -entity vga -section_id Top was ignored" {  } {  } 0 20014 "Assignment for entity %1!s! was ignored" 0 0 "Design Software" 0 -1 1651562394263 ""} { "Warning" "WQCU_IGNORED_ENTITY_ASSIGNMENT" "set_global_assignment -name MERGE_EQUIVALENT_BIDIRS ON -entity vga -section_id Top " "Assignment for entity set_global_assignment -name MERGE_EQUIVALENT_BIDIRS ON -entity vga -section_id Top was ignored" {  } {  } 0 20014 "Assignment for entity %1!s! was ignored" 0 0 "Design Software" 0 -1 1651562394263 ""} { "Warning" "WQCU_IGNORED_ENTITY_ASSIGNMENT" "set_global_assignment -name ABSORB_PATHS_FROM_OUTPUTS_TO_INPUTS ON -entity vga -section_id Top " "Assignment for entity set_global_assignment -name ABSORB_PATHS_FROM_OUTPUTS_TO_INPUTS ON -entity vga -section_id Top was ignored" {  } {  } 0 20014 "Assignment for entity %1!s! was ignored" 0 0 "Design Software" 0 -1 1651562394263 ""} { "Warning" "WQCU_IGNORED_ENTITY_ASSIGNMENT" "set_global_assignment -name PARTITION_EXTRACT_HARD_BLOCK_NODES ON -entity vga -section_id Top " "Assignment for entity set_global_assignment -name PARTITION_EXTRACT_HARD_BLOCK_NODES ON -entity vga -section_id Top was ignored" {  } {  } 0 20014 "Assignment for entity %1!s! was ignored" 0 0 "Design Software" 0 -1 1651562394263 ""} { "Warning" "WQCU_IGNORED_ENTITY_ASSIGNMENT" "set_global_assignment -name PARTITION_ENABLE_STRICT_PRESERVATION OFF -entity vga -section_id Top " "Assignment for entity set_global_assignment -name PARTITION_ENABLE_STRICT_PRESERVATION OFF -entity vga -section_id Top was ignored" {  } {  } 0 20014 "Assignment for entity %1!s! was ignored" 0 0 "Design Software" 0 -1 1651562394263 ""}  } {  } 0 20013 "Ignored %2!d! assignments for entity \"%1!s!\" -- entity does not exist in design" 0 0 "Analysis & Synthesis" 0 -1 1651562394263 ""}
{ "Info" "IBPM_HARD_BLOCK_PARTITION_CREATED" "hard_block:auto_generated_inst " "Generating hard_block partition \"hard_block:auto_generated_inst\"" { { "Info" "IBPM_HARD_BLOCK_PARTITION_NODE" "0 0 0 0 0 " "Adding 0 node(s), including 0 DDIO, 0 PLL, 0 transceiver and 0 LCELL" {  } {  } 0 16011 "Adding %1!d! node(s), including %2!d! DDIO, %3!d! PLL, %4!d! transceiver and %5!d! LCELL" 0 0 "Design Software" 0 -1 1651562394458 ""}  } {  } 0 16010 "Generating hard_block partition \"%1!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1651562394458 ""}
{ "Warning" "WCUT_CUT_UNNECESSARY_INPUT_PIN_HDR" "11 " "Design contains 11 input pin(s) that do not drive logic" { { "Warning" "WCUT_CUT_UNNECESSARY_INPUT_PIN" "KEY\[1\] " "No output dependent on input pin \"KEY\[1\]\"" {  } { { "vga_top.v" "" { Text "C:/Users/ziyua/Downloads/lab4.vga_top/vga_top/vga_top.v" 48 0 0 } }  } 0 15610 "No output dependent on input pin \"%1!s!\"" 0 0 "Design Software" 0 -1 1651562394517 "|vga_top|KEY[1]"} { "Warning" "WCUT_CUT_UNNECESSARY_INPUT_PIN" "KEY\[2\] " "No output dependent on input pin \"KEY\[2\]\"" {  } { { "vga_top.v" "" { Text "C:/Users/ziyua/Downloads/lab4.vga_top/vga_top/vga_top.v" 48 0 0 } }  } 0 15610 "No output dependent on input pin \"%1!s!\"" 0 0 "Design Software" 0 -1 1651562394517 "|vga_top|KEY[2]"} { "Warning" "WCUT_CUT_UNNECESSARY_INPUT_PIN" "SW\[0\] " "No output dependent on input pin \"SW\[0\]\"" {  } { { "vga_top.v" "" { Text "C:/Users/ziyua/Downloads/lab4.vga_top/vga_top/vga_top.v" 45 0 0 } }  } 0 15610 "No output dependent on input pin \"%1!s!\"" 0 0 "Design Software" 0 -1 1651562394517 "|vga_top|SW[0]"} { "Warning" "WCUT_CUT_UNNECESSARY_INPUT_PIN" "SW\[1\] " "No output dependent on input pin \"SW\[1\]\"" {  } { { "vga_top.v" "" { Text "C:/Users/ziyua/Downloads/lab4.vga_top/vga_top/vga_top.v" 45 0 0 } }  } 0 15610 "No output dependent on input pin \"%1!s!\"" 0 0 "Design Software" 0 -1 1651562394517 "|vga_top|SW[1]"} { "Warning" "WCUT_CUT_UNNECESSARY_INPUT_PIN" "SW\[2\] " "No output dependent on input pin \"SW\[2\]\"" {  } { { "vga_top.v" "" { Text "C:/Users/ziyua/Downloads/lab4.vga_top/vga_top/vga_top.v" 45 0 0 } }  } 0 15610 "No output dependent on input pin \"%1!s!\"" 0 0 "Design Software" 0 -1 1651562394517 "|vga_top|SW[2]"} { "Warning" "WCUT_CUT_UNNECESSARY_INPUT_PIN" "SW\[3\] " "No output dependent on input pin \"SW\[3\]\"" {  } { { "vga_top.v" "" { Text "C:/Users/ziyua/Downloads/lab4.vga_top/vga_top/vga_top.v" 45 0 0 } }  } 0 15610 "No output dependent on input pin \"%1!s!\"" 0 0 "Design Software" 0 -1 1651562394517 "|vga_top|SW[3]"} { "Warning" "WCUT_CUT_UNNECESSARY_INPUT_PIN" "SW\[4\] " "No output dependent on input pin \"SW\[4\]\"" {  } { { "vga_top.v" "" { Text "C:/Users/ziyua/Downloads/lab4.vga_top/vga_top/vga_top.v" 45 0 0 } }  } 0 15610 "No output dependent on input pin \"%1!s!\"" 0 0 "Design Software" 0 -1 1651562394517 "|vga_top|SW[4]"} { "Warning" "WCUT_CUT_UNNECESSARY_INPUT_PIN" "SW\[5\] " "No output dependent on input pin \"SW\[5\]\"" {  } { { "vga_top.v" "" { Text "C:/Users/ziyua/Downloads/lab4.vga_top/vga_top/vga_top.v" 45 0 0 } }  } 0 15610 "No output dependent on input pin \"%1!s!\"" 0 0 "Design Software" 0 -1 1651562394517 "|vga_top|SW[5]"} { "Warning" "WCUT_CUT_UNNECESSARY_INPUT_PIN" "SW\[6\] " "No output dependent on input pin \"SW\[6\]\"" {  } { { "vga_top.v" "" { Text "C:/Users/ziyua/Downloads/lab4.vga_top/vga_top/vga_top.v" 45 0 0 } }  } 0 15610 "No output dependent on input pin \"%1!s!\"" 0 0 "Design Software" 0 -1 1651562394517 "|vga_top|SW[6]"} { "Warning" "WCUT_CUT_UNNECESSARY_INPUT_PIN" "SW\[7\] " "No output dependent on input pin \"SW\[7\]\"" {  } { { "vga_top.v" "" { Text "C:/Users/ziyua/Downloads/lab4.vga_top/vga_top/vga_top.v" 45 0 0 } }  } 0 15610 "No output dependent on input pin \"%1!s!\"" 0 0 "Design Software" 0 -1 1651562394517 "|vga_top|SW[7]"} { "Warning" "WCUT_CUT_UNNECESSARY_INPUT_PIN" "SW\[8\] " "No output dependent on input pin \"SW\[8\]\"" {  } { { "vga_top.v" "" { Text "C:/Users/ziyua/Downloads/lab4.vga_top/vga_top/vga_top.v" 45 0 0 } }  } 0 15610 "No output dependent on input pin \"%1!s!\"" 0 0 "Design Software" 0 -1 1651562394517 "|vga_top|SW[8]"}  } {  } 0 21074 "Design contains %1!d! input pin(s) that do not drive logic" 0 0 "Analysis & Synthesis" 0 -1 1651562394517 ""}
{ "Info" "ICUT_CUT_TM_SUMMARY" "232 " "Implemented 232 device resources after synthesis - the final resource count might be different" { { "Info" "ICUT_CUT_TM_IPINS" "15 " "Implemented 15 input pins" {  } {  } 0 21058 "Implemented %1!d! input pins" 0 0 "Design Software" 0 -1 1651562394520 ""} { "Info" "ICUT_CUT_TM_OPINS" "87 " "Implemented 87 output pins" {  } {  } 0 21059 "Implemented %1!d! output pins" 0 0 "Design Software" 0 -1 1651562394520 ""} { "Info" "ICUT_CUT_TM_LCELLS" "130 " "Implemented 130 logic cells" {  } {  } 0 21061 "Implemented %1!d! logic cells" 0 0 "Design Software" 0 -1 1651562394520 ""}  } {  } 0 21057 "Implemented %1!d! device resources after synthesis - the final resource count might be different" 0 0 "Analysis & Synthesis" 0 -1 1651562394520 ""}
{ "Info" "IQEXE_ERROR_COUNT" "Analysis & Synthesis 0 s 112 s Quartus Prime " "Quartus Prime Analysis & Synthesis was successful. 0 errors, 112 warnings" { { "Info" "IQEXE_END_PEAK_VSIZE_MEMORY" "4830 " "Peak virtual memory: 4830 megabytes" {  } {  } 0 0 "Peak virtual memory: %1!s! megabytes" 0 0 "Design Software" 0 -1 1651562394551 ""} { "Info" "IQEXE_END_BANNER_TIME" "Tue May 03 00:19:54 2022 " "Processing ended: Tue May 03 00:19:54 2022" {  } {  } 0 0 "Processing ended: %1!s!" 0 0 "Design Software" 0 -1 1651562394551 ""} { "Info" "IQEXE_ELAPSED_TIME" "00:00:14 " "Elapsed time: 00:00:14" {  } {  } 0 0 "Elapsed time: %1!s!" 0 0 "Design Software" 0 -1 1651562394551 ""} { "Info" "IQEXE_ELAPSED_CPU_TIME" "00:00:35 " "Total CPU time (on all processors): 00:00:35" {  } {  } 0 0 "Total CPU time (on all processors): %1!s!" 0 0 "Design Software" 0 -1 1651562394551 ""}  } {  } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "Analysis & Synthesis" 0 -1 1651562394551 ""}
