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EEC286 – Introduction To Digital System Testing

3 units – Winter Quarter; alternate years

Lecture: 3 hours

Prerequisite: EEC 180A, STA 120 or  STA 131A

Grading: Letter; homework (30%), midterm exam (30%) and final (40%).

Catalog Description:

A review of several current techniques used to diagnose faults in both combinational and sequential circuits. Topics include path sensitization procedures, Boolean difference, D-algorithm random test generation, TC testing and an analysis of the effects of intermittent faults. (Offered in even years.)

Expanded Course Description:

  1. Fault Models
  2. Fault Detection in Combinational Circuits
    1. Boolean Difference
    2. Path Sensitization
    3. D-Algorithm
    4. Boolean Real Transform
  3. Fault Location Algorithms
  4. Special Fault Conditions
    1. Multiple Faults
    2. Redundant Circuits
    3. Bridging Faults
    4. Intermittent Faults
  5. Fault Detection in Sequential Circuits
    1. Extended D-Algorithm
    2. Critical Path Analysis
    3. Asynchronous Circuits
  6. Other Approaches to Testing
    1. Memory Testing
    2. Random Test Generation
    3. TC Testing


  1. M. Abramovici, M.A. Breuer and A.D. Friedman, Digital Systems Testing and Testable Design, Computer Science Press, 1990.

Instructor: Redinbo


Last revised: October 1996