Zhibin Xiao

                        Ph.D. Candidate

                        VLSI Computation Lab

                        Department of Electrical and Computer Engineering.

                        University of California, Davis

                        Office: Room 2211, Kemper Hall

                        Email: zxiao at ucdavis.edu

                        Phone: (530)752-5074

I am currently a Ph.D. candidate in the ECE department at UC Davis, affiliated with the VLSI Computation Lab led by Professor Bevan Baas. My current research is mainly focused on many-core processor architecture and high-performance and energy-efficient VLSI design for DSP implementations. I received my B.S. and M.S. degree in Information Engineering from Zhejiang University, Hangzhou, China.

• Many-core Processor Topology and Memory Architecture
  
• Parallel Progamming for Video Applications
  
• VLSI implementation for DSP Algorithms
  

• Zhibin Xiao and Bevan Baas,
  "Processor Shapes and Topologies for Dense On-chip Networks,"
  IEEE International Solid-Sate Circuit Conference (ISSCC 2012) student forum, San Francisco, CA, Feb. 2012.
  

• Aaron Stillmaker, Zhibin Xiao and Bevan M. Baas,
  "Toward More Accurate Scaling Estimates of CMOS Circuits from 180 nm to 22 nm,"
  Technical Report ECE-VCL-2011-4, VLSI Computation Laboratory, ECE Department, University of California, Davis, December 2011.

• Aaron Stillmaker, Zhibin Xiao, Bin Liu, and Bevan M. Baas,
  "Computing Enterprise Workloads With Many-Core Arrays and Special-Purpose Processors," C2S2 Annual Review, October 2011.

• Zhibin Xiao, Stephen Le and Bevan Baas,
  "A Fine-Grained Parallel Implementation of a H.264/AVC Encoder on a 167-processor Computational Platform,"
  IEEE Asilomar Conference on Signals, Systems and Computers (ACSSC), Pacific Grove, CA, November 2011.
  

• Zhibin Xiao and Bevan Baas,
  "A 1080p H.264/AVC Baseline Residual Encoder for a Fine-grained Many-core System,"
  IEEE Transactions on Circuits and Systems for Video Technology, vol. 21, no. 7, pp. 890-902, July 2011.
  

• Aaron Stillmaker, Zhibin Xiao, and Bevan M. Baas,
  "Computing Enterprise Workloads With Many-Core Arrays and Special-Purpose Processors," C2S2 Annual Review, October 2010.

• Zhibin Xiao, Stephen Le and Bevan Baas,
  "An Energy-Efficient Parallel H.264/AVC Baseline Encoder on a Fine-grained Many-core System,"
  Technology and Talent for the 21st Century (TECHCON 2010), Austin, TX, Sep. 2010.
  

• Dean Truong, Wayne Cheng, Tinoosh Mohsenin, Zhiyi Yu, Anthony Jacobson, Gouri Landge, Michael Meeuwsen, Christine Watnik, Anh Tran, Zhibin Xiao, Eric Work, Jeremy Webb, Paul Mejia, Bevan Baas,
  "A 167-Processor Computational Platform in 65 nm CMOS,"
  IEEE Journal of Solid-State Circuits (JSSC), vol. 44, no. 4, pp. 1130-1144, April 2009.
  Invited.

• Zhibin Xiao and Bevan Baas,
  "A High-Performance Parallel CAVLC Encoder on a Fine-Grained Many-core System,"
  In Proceedings of the IEEE International Conference on Computer Design (ICCD '08), October 2008, pp. 248-254.

• Dean Truong, Wayne Cheng, Tinoosh Mohsenin, Zhiyi Yu, Toney Jacobson, Gouri Landge, Michael Meeuwsen, Christine Watnik, Paul Mejia, Anh Tran, Jeremy Webb, Eric Work, Zhibin Xiao, Bevan Baas,
  "A 167-processor Computational Array for Highly-Efficient DSP and Embedded Application Processing,"
  In Proceedings of the IEEE HotChips Symposium on High-Performance Chips, (HotChips 2008), August 2008.

• Dean Truong, Wayne Cheng, Tinoosh Mohsenin, Zhiyi Yu, Toney Jacobson, Gouri Landge, Michael Meeuwsen, Christine Watnik, Paul Mejia, Anh Tran, Jeremy Webb, Eric Work, Zhibin Xiao, Bevan Baas,
  "A 167-processor 65 nm Computational Platform with Per-Processor Dynamic Supply Voltage and Dynamic Clock Frequency Scaling,"
  In Proceedings of the Symposium on VLSI Circuits, June 2008, C3.1., pp. 22-23.

• Zhibin Xiao, Peng Liu, Yingbiao Yao and Qingdong Yao
  "Optimizing pipeline for a RISC processor with multimedia extension ISA,"
  Journal of Zhejiang University SCIENCE (JZUS), vol. 7, no.12, pp. 269-274, Oct. 2006.
  

• Yingbiao Yao, Qingdong Yao, Peng Liu and Zhibin Xiao,
  "Program Generation for Functional Verification of Microprocessor,"
  Journal of Computer-Aided Design & Computer Graphics (in Chinese), vol.18, no.10, 2006.
  

• Peng Liu, Wei-dong Wang, Zhi-bin Xiao, Li-ya Lai, Zhao-wei Teng, Guo-jun Yu, Ying-biao Yao, Ke-ming Chen, Zhi-di Jiang, Yi-xiong Zhang, Jian Zhou, Wei-guang Cai, Zhi-bo Zhai, Ce Shi and Qingdong Yao,
  "MediaSoC: a system-on-chip architecture for multimedia application,"
  IEEE International Workshop on VLSI Design and Video Technology , pp. 161-164, May 2005.
  

• Yingbiao Yao, Qingdong Yao, Peng Liu and Zhibin Xiao,
  "Embedded software optimization for MP3 decoder implemented on RISC core ,"
  IEEE Transactions on Consumer Electronics, vol. 50, no. 4, pp. 1244-1249, Nov. 2004.
  

• Journal Reviewer: IEEE Transactions on Circuit and Systems I, II, IEEE Transactions on Circuit and Systems for Video Technology, IEEE Journal of Solid-State Circuits (JSSC).
  
• Conference Reviewer: International Conference on Computer Design (ICCD) 2009.
  

Teaching Assistant, EEC 180B: Digital Systems II, Spring 2011.

Teaching Assistant, EEC 180A: Digital Systems I, Fall 2011.

Guest Lecturer, EEC 116: VLSI Design, Fall 2010.

Misc Items

VI cheat sheet

Special Issues on IEEE Signal Processing

Conferences for Architectures and Signal Processing