Zhiyi Yu's Publications

  1. Dean Truong, Wayne Cheng, Tinoosh Mohsenin, Zhiyi Yu, Toney Jacobson, Gouri Landge, Michael Meeuwsen, Christine Watnik, Paul Mejia, Anh Tran, Jeremy Webb, Eric Work, Zhibin Xiao, Bevan Baas, "A 167-processor 65 nm Computational Platform with Per-Processor Dynamic Supply Voltage and Dynamic Clock Frequency Scaling", IEEE Symposium on VLSI Circuits, in press
  2. Zhiyi Yu, Bevan Baas, "High Performance, Energy Efficiency, and Scalability with GALS Chip Multiprocessors", IEEE Transactions of Very Large Scale Integration Systems (TVLSI), in press.
  3. Zhiyi Yu, Bevan Baas, "An Low-Area Interconnect Architecture for Chip Multiprocessors", IEEE International Symposium on Circuits and Systems (ISCAS), in press.
  4. Zhiyi Yu, Michael Meeuwsen, Ryan Apperson, Omar Sattari, Michael Lai, Jeremy Webb, Eric Work, Tinoosh Mohsenin, Bevan Baas, "Architecture and Evaluation of An Asynchronous Array of Simple Processors", Journal of VLSI Signal Processing Systems, March 2008.
  5. Zhiyi Yu, Michael Meeuwsen, Ryan Apperson, Omar Sattari, Michael Lai, Jeremy Webb, Eric Work, Dean Truong, Tinoosh Mohsenin, Bevan Baas, "AsAP: An Asynchronous Array of Simple Processors", IEEE Journal of Solid-State Circuits (JSSC), vol. 43, no. 3, pp. 695-705, March 2008.
  6. Ryan Apperson, Zhiyi Yu, Michael Meeuwsen, Tinoosh Mohsenin, Bevan Baas, "A Scalable Dual-Clock FIFO for Data Transfers between Arbitrary and Haltable Clock Domains", IEEE Transactions of Very Large Scale Integration Systems (TVLSI), October 2007, pp: 1125-1134.
  7. Michael Meeuwsen, Zhiyi Yu, Bevan Baas, "A Shared Memory Module for Asynchronous Arrays of Processors", EURASIP Journal on Embedded Systems , vol. 2007, Article ID 86273, 13 pages, 2007.
  8. Bevan Baas, Zhiyi Yu, Michael Meeuwsen, Omar Sattari, Ryan Apperson, Eric Work, Jeremy Webb, Michael Lai, Tinoosh Mohsenin, Dean Truong, Jason Cheung, "AsAP: A Fine-grain Multi-core Platform for DSP Applications", IEEE Micro , March/April 2007, pp:34-45.
  9. Zhiyi Yu, Bevan Baas, "Implementing Tile-based Chip Multiprocessors with GALS Clocking Styles", IEEE International Conference of Computer Design (ICCD) , October 2006, pp:174-179.
  10. Bevan Baas, Zhiyi Yu, Michael Meeuwsen, Omar Sattari, Ryan Apperson, Eric Work, Jeremy Webb, Michael Lai, Daniel Gurman, Chi Chen, Jason Cheung, Dean Truong, Tinoosh Mohsenin, "Hardware and Applications of AsAP: An Asynchronous Array of Simple Processors," IEEE HotChips Symposium on High-Performance Chips, (HotChips) , August 2006.
  11. Zhiyi Yu, Bevan Baas, "Performance and Power Analysis of Globally Asynchronous Locally Synchronous multi-processor systems", IEEE Computer Society Annual Symposium on VLSI (ISVLSI) , March, 2006, pp:378-384.
  12. Zhiyi Yu, Michael Meeuwsen, Ryan Apperson, Omar Sattari, Michael Lai, Jeremy Webb, Eric Work, Tinoosh Mohsenin, Mandeep Singh, Bevan Baas, "An Asynchronous Array of Simple Processors for DSP Applications", IEEE International Solid-State Circuits Conference (ISSCC), February, 2006, pp:428-429.
  13. Zhiyi Yu, Zhenyu Gu, Bo Shen, Qianling Zhang, "The Automatic Generation of the Microprocessor Functional Verification Program Focusing on the Pipelining Hazard", MINI-MICRO Systems , July 2004, Vol.25, No.7, pp:1212-1215, (in chinese)
  14. Zhenyu Gu, Zhiyi Yu, Bo Shen, Qianling Zhang, "The Simulation based Functional Verification Technique for a 32-bit RISC Microprocessor", MINI-MICRO Systems , 2004, Vol.25, No.4 pp:752-756, (in chinese)
  15. Zhiyi Yu, Jianfei Lei, Wenhong Li, Qianling Zhang, "A JTAG Circuit Design suitable for the SOC System", Research and Progress of Solid State Electronics , Feb. 2003, vol.23 No.1, pp:62-66, (in Chinese)
  16. Zhenyu Gu, Zhiyi Yu, Bo Shen, Qianling Zhang, "Functional Verification Methodology of a 32-bit RISC Microprocessor", International Conference on Communications, Circuits and Systems, 2002, pp1154-1458.
  17. Zhiyi Yu, Zhenyu Gu, Bo Shen, Qianling Zhang, "The Automatic Generation of the Microprocessor Functional Verification Program based on the Test Case Technique", 17th Chinese Circuit and System Conference , 2002, pp:VII7-VII10, (in Chinese)
  18. Bo Shen, Baoyan Ding, Zhenyu Gu, Zhiyi Yu, Qianling Zhang, "The VLSI design for the MP3 Audio Decode DSP", 16st Chinese Circuit and System Conference , 2001, pp:288-292, (in Chinese),

    19. Note: Copyright of papers belongs to publishers.