Resume

(Download PDF) Update: 5/8/2012



Stanley W. Hsu


Education

University of California, Davis

	Doctor of Philosophy, Electrical and Computer Engineering	September 2007 - Present
					Advanced to Candidacy on 12/2011			
		Emphasis: Ultra-Low Power Mixed-Signal Circuit Design

University of California, Los Angeles

	Bachelor of Science, Electrical Engineering			December 2006
		Emphasis: Computer Engineering

Experience

Graduate Student Researcher at University of California, Davis

	March 2008 - Present
Advanced to Ph.D. Candidacy on 12/2011
  • Design space exploration of decimation filters for leakage power reduction
    • Matlab modeling and simulation
    • Verilog and Mixed-mode simulation
    • Full custom layout in 90nm and 180nm processes
  • Energy consumption modeling of emerging memories
    • Non-volatile resistive and capacitive memories
    • FIFO data queue for energy harvesting sensor nodes with varying supply voltage
  • Back-scatter transmitter for passive data transmission
    • Calibration of the termination network impedance for PVT variations
    • Adaptive biasing of the termination network for minimizing PVT variations
  • Tool flow setup
    • Setup ASIC design flow (from custom library creation to synthesis and physical design) using Cadence tools
    • Developed and characterized a 25 cell standard cell library in 90 nm process
  • Mentoring undergraduate students
    • Low power IC design, statistical simulations, and mixed-mode simulation of memory modules
    • Renewable energy lab and homework development for MATLAB problem solving course
    • Development of custom solar measurement module based on Arduino UNO
    • Interfacing TI wireless module to Arduino UNO

Instructor at University of California, Davis

	April 2012 - June 2012
  • EEC118: Digital Integrated Circuits
    • Present weekly lectures. Give homework, quizzes, and exams.
    • Topics: MOS transistor. CMOS combinational and sequential circuits. Dynamic, static, and alternative logic styles. Logical effort. Interconnect, power, and timing issues.

Teaching Assistant at University of California, Davis

	September 2007 - Present
Lead discussions, held weekly office hours, corrected assignments, and administered exams.
  • ENG6: Engineering Problem Solving (lead TA)
    • Developed lab exercises with emphasis on renewable and solar energy
    • Developed solar hardware module for students to gain hands-on experience in solar data measurement
    • Lead lab sections to teach general programming concepts using MATLAB
    • One of the two lead TAs for a class with 250+ students, with 4 other TAs.
    • Website development
  • EEC119A/B: Integrated Circuit Design Project
    • Worked with individual teams on the design of a SRAM module and a pixel imager
    • Two quarters senior design class
  • ECE136A/B: Electronic System Design
    • Worked with individual teams on the design of a pulse oximeter
    • Taught students on the basics of electronic system design, implementation, testing, and debugging
    • Two quarters senior design class
  • EEC116: VLSI Design
  • EEC110A: Electronic Circuits
  • EEC140A: Principles of Device Physics
  • EEC172: Microcomputer-Based System Design
  • EEC170: Computer Architecture
  • ENG17: Circuits I
  • ENG100: Electronic Circuits and Systems

Hardware Design Engineer at Cisco Systems Inc.

	January 2007 - September 2007
  • Worked effectively with cross discipline engineers on design specifications and requirements.
  • Schematic capture, PCB design, design review, and successful fabout of a high speed router plug-in module.
  • Trace width calculations and IR drop simulations for the power distribution network on the router.
  • Bypass capacitor study and presentation.

Undergraduate Research Intern at Networked Embedded Systems Laboratory, UCLA

	October 2005 - December 2006
  • Developed a data acquisition front-end for an electrocardiograph and an expansion for the Gumstix sensor node.
  • Collaborated with graduate students and other interns on other hardware projects.

Hardware Intern at Altera Corp.

	June 2006 - September 2006
  • Upgraded a test system which compares simulation to hardware results.
  • Performed schematic design and PCB layout, FPGA programming and high level computer programming.

Skills

  • CAD Tools: MATLAB, SPICE, Cadence Custom IC Design Environment, Encounter, RTL Compiler, Mentor Graphics PCB Design Environment, Altera Quartus, Xilinx ISE
  • Other: Verilog, Signal Integrity, VLSI Design, C, C++, Python.

Awards & Leadership

  • IEEE Teaching Assistant of the Year, University of California, Davis 2009 to 2010
  • UC Davis Entrepreneurship Academy Summer, 2010
  • UC Davis ECE Department Fellowship Spring, 2008
  • CENS-INTEL Scholar, University of California, Los Angeles Winter, Spring 2006
  • UCLA IEEE Chair, University of California, Los Angeles 2005 - 2006