EEC118 - Digital Integrated Circuits
UC Davis
Dept. of Electrical and Computer Engineering


Announcements

  1. Midterm Grades

    Your midterm grades are available on MyUCDavis. The scores posted there are the raw scores. The midterm statistics and curve information are available here. Convert your raw score to a percentage of the point total (90 possible points) to find the range of your final (curved) score. Midterms will be handed back next week.


  2. Instructor:

    Prof. Rajeevan Amirtharajah
    3173 Kemper Hall
    E-mail:    ramirtha@ece.ucdavis.edu
    Office Hours: Thurs 1-3 PM or by appointment.

    Teaching Assistants:
    Anurag Chaudhry
    E-mail:    achaudhry@ucdavis.edu
    Office hours: Fri 11-12 AM Kemper 2101

    Course Information
    Lecture:
    Mon/Wed 11:00 am - 12:00 pm in Wellman 234

    Textbook:
    CMOS Digital Integrated Circuits: Analysis and Design
    S-M. Kang and Y. Leblebici
    3rd edition

    References:
    Digital Integrated Circuits: A Design Perspective
    J. Rabaey, A. Chandrakasan, and B. Nikolic
    2nd edition

    CMOS VLSI Design - A Circuits and Systems Perspective
    N. H. Weste and D. Harris
    3rd edition

    Midterm: Wed 5/3/06 in class.
    Closed book, closed notes. Calculators are allowed.

    Final: Wednesday June 14th, 8 to 10 am, in normal lecture room (Wellman 234)

    Communication
    Course web page:   http://www.ece.ucdavis.edu/courses/S06/EEC118/
    Email. Please use email to contact me or the TA for your lab section only, for urgent or personal matters that cannot be handled through office hours, in-class questions, or immediately after class.

    Grading

    Course Policies

    Homework

    Quizzes, Midterm, and Final exam

    Course Schedule

    Future details are tentative.

    Date Reading Lecture Slides Notes
    Wed, March 29 Kang 1, 3 Course introduction, MOSFET overview  pdf  
    Mon, April 3 Kang 3.1-3.4 MOS Structure and Basic Operation  pdf  
    Wed, April 5 Kang 3.5-3.6, 5.1-5.3 MOSFET Scaling and Capacitances
    Inverters
     pdf  
    Mon, April 10 Kang 5.1-5.3 Inverters
    CMOS Inverters
     pdf  
    Wed, April 12 Kang 5.4 CMOS Inverters  pdf  Quiz 1 (sol)
    Mon, April 17 Kang 2 MOS Fabrication  pdf  
    Wed, April 19 Kang 6.1-6.4 Inverter Transient Characteristics  pdf  
    Mon, April 24 Kang 7.3-7.4 Combinational MOS Logic  pdf  
    Wed, April 26 Kang 8.1-8.3 CMOS Logic Transient Characteristics  pdf
     
     Quiz 2 (sol)
    Mon, May 1 Kang 8.4-8.5 Sequential MOS Logic I  pdf  
    Wed, May 3 - Midterm  Solution (pdf)  EEC 118 Spring 2005 Midterm
    EEC 118 Spring 2005 Midterm Solutions
    Mon, May 8 Rabaey 11 Arithmetic Circuits I    pdf (B&W)  
    Wed, May 10 Rabaey 11
    Kang 9.1-9.2
    Arithmetic Circuits II
    Alternative Static Logic Families I
     
     pdf
     
    Mon, May 15 Kang 9.4-9.6 Alternative Static Logic Families II
       
    Wed, May 17 Kang 10.1-10.2 Dynamic Logic Circuits  pdf  Quiz 3 (sol)
    Mon, May 22 Kang 10.3-10.5 Memories I  pdf  
    Wed, May 24 Kang 6.7, 11 Memories II
    Low Power CMOS Logic Circuits
     
     pdf
     
    Mon, May 29   Memorial Day Holiday    
    Wed, May 31 Kang 6.5-6.6 Interconnect  pdf  Quiz 4 (sol)
    Mon, June 5 Kang 14 Design for Manufacturability  pdf  
    Wed, June 7 - Alternative Logic Technologies
    Final Review
     pdf  
    Wed, June 14 - Final  Solution  EEC 118 Spring 2005 Final
    EEC 118 Spring 2005 Final Solutions

    Assignments

    Week Prelab due and
    work in Lab
    Lab report due at
    beginning of lab section
    Hwk due
    Friday 4pm
    Homework problems
    March 29 - - - -
    April 3 - April 5 Lab 1
    Lab Report Format
    4001 Datasheet
    4007 Datasheet
    4049 Datasheet
    - 1 (sol) Kang & Leblebici 1.4, 3.1, 3.3
    April 10 - April 12 Lab 2 Lab 1 2 (sol) Kang & Leblebici 5.4, 5.6, 5.7(a), 5.8
    April 17 - April 19 Lab 3 Part 1
    Lab 3 Part 1 Spice Template (lab3pt1.sp)
    130nm Device Model File (130nm_nominal.sp)
    UCB EE141 Hspice Tips (Ignore Section I)
    Lab 2 3 (sol) HW3
    April 24 - April 26 Lab 3 Part 2  Lab 3 Part 1 4 (sol) Kang & Leblebici 6.8, 6.9, 6.10
    May 1 - May 3 No lab No lab due - No homework (Midterm May 3)
    May 8 - May 10  Design Project Part 1
    EEC 180A Lab 1 (Quartus Tutorial)
     Lab 3 Part 2  5 (sol) HW5
    May 15 - May 17  Design Project Part 2
    designpt2.sp
    UCD EEC 118 Hspice Tips
     Design Project Part 1  -  
    May 22 - May 24  Final Project
    finalproject.sp
     Design Project Part 2 6 (sol)  Kang & Leblebici 9.1, 9.7(a)
    May 29 - May 31     7 (optional) (sol)  Kang & Leblebici 10.2, 10.4
    June 5 - June 7    Final Project Report    











    UPDATES:

    6/07/06 - Added Lecture 17, homework solutions, Spring 2005 final
    6/04/06 - Added Lecture 16
    5/30/06 - Added Lecture 15
    5/22/06 - Added Lecture 14, updated Lecture 13
    5/22/06 - Added Lecture 13, final project
    5/15/06 - Added Lecture 12
    5/11/06 - Added midterm results and design project, part 2 information
    5/09/06 - Added Lecture 11
    5/07/06 - Added arithmetic circuits lecture notes
    5/04/06 - Added HW5 and DP1 part 1
    4/30/06 - Added Lecture 9
    4/24/06 - Added Lectures 7 and 8
    4/16/06 - Added HW 3
    4/11/06 - Added Lectures 4 and 5 and Lab 3, parts 1 and 2
    4/08/06 - Added Lecture 3 and Lab 2
    3/29/06 - Added Lecture 1, HW 1, Lab 1, data sheets and Lab Report Format
    3/28/06 - Created


    Webpage created on 3/28/06 by R. Amirtharajah

    Last modified 6/07/06