Marko Aleksic

 

Short Bio

Born in Belgrade, Serbia, 1976.  Received Dipl.Ing. degree from School of Electrical Engineering, University of Belgrade, Sep 2000.  After graduation, joined ACSEL (Advanced Computer Systems Engineering Lab) as a Post-Graduate Researcher.  Since Sep 2001, pursuing Ph.D. degree at Department of Electrical Engineering, University of California – Davis.  Received M.S. degree in Electrical Engineering from UC Davis in Mar 2004.  Currently a member of SSCRL (Solid State Circuits Research Lab), working under Professors K. W. Current and V. G. Oklobdzija.

 

Download

·    Resume (pdf, 128kB)

·    Curriculum vitae (pdf)

·    Ph.D. Research proposal (pdf, 447kB, password-protected)

 

Research Interests

·    Design of integrated circuits for high-performance and low-power systems

·    Noise analysis of integrated circuits

·    Clock generation and recovery

 

Publications

[1] M. Aleksic, N. Nedovic, K. W. Current and V. G. Oklobdzija, “A New Model for Timing Jitter Caused by Device Noise in Current-Mode Logic Frequency Dividers”, Proceedings of the 15th International Workshop on Power And Timing Modeling, Optimization and Simulation, PATMOS, Leuven, Belgium, September 21-23, 2005.

[2] N. Nedovic, W. W. Walker, V. G. Oklobdzija and M. Aleksic, “A Low Power Symmetrically Pulsed Dual Edge-Triggered Flip-Flop”, Proceedings of the 28th European Solid-State Circuits Conference, Florence, Italy, September 24-26, 2002.

[3] N. Nedovic, M. Aleksic and V. G. Oklobdzija, “Conditional Pre-Charge Techniques for Power-Efficient Dual-Edge Clocking”, Proceedings of the International Symposium on Low-Power Electronics and Design, Monterey, California, August 12-14, 2002.

[4] N. Nedovic, M. Aleksic and V. G. Oklobdzija, “Comparative Analysis of Double-Edge versus Single-Edge Triggered Clocked Storage Elements, 2002 IEEE International Symposium on Circuits and Systems, Scottsdale, Arizona, May 26-29, 2002.

[5] N. Nedovic, M. Aleksic and V. G. Oklobdzija, ““Timing Characterization of Dual-Edge Triggered Flip-Flops”,, Proceedings of the International Conference on Computer Design, ICCD 2001, Austin, Texas, September 23-26, 2001.

[6] N. Nedovic, M. Aleksic and V. G. Oklobdzija, Conditional Techniques for Small Power Consumption Flip-Flops, Proceedings of the 8th IEEE International Conference on Electronics and Systems, Malta, September 2-5, 2001.

 

Contact

E-mail: maleksic@ece.ucdavis.edu

Tel: 1-530-752-6347

Department of Electrical and Computer Engineering

University of California

One Shields Ave.

Davis, CA 95616

USA

 

Links

Research web page (password-protected)

Personal web page