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For FPGA Design and most other programming I use gVim, which is enhanced Vim running in a GUI similar to notepad. There are many advantages of using gVim rather than a basic text editor, but an important feature is syntax highlighting. Below are examples of how I customize gVim for FPGA Design:


Viewing Xilinx UCF files with Syntax Highlighting in gVim?
When constraining a Xilinx device, it can be helpful to view the constraints file with syntax highlighting. This allows you to catch spelling mistakes of keywords and to distinguish the actual contraints from the UCF syntax. gVim allows for custom syntax highlighting files to be created, and integrated into the gVim GUI. I have created a gVim syntax file for the Xilinx UCF syntax, which can be downloaded [here]. The ucf.vim file should be saved to the gVim installation directory:
        <gvim_install_drive>:\Vim\vim71\syntax\ 
In addition to saving the ucf.vim file to the install directory, two other files need to be modified:
  1. filetype.vim : contains the file type and file extension associations.

    • The filetype.vim is located in the gVim installation directory:
                      <gvim_install_drive>:\Vim\vim71\ 
    • Add the following lines to the filetype.vim file in the "U" category:
              " Xilinx UCF
              au BufNewFile,BufRead *.ucf                     setf ucf
  2. synmenu.vim : contains the Syntax File Types menu entries.

    • The synmenu.vim is located in the gVim installation directory:
                      <gvim_install_drive>:\Vim\vim71\ 
    • Add the following line to the synmenu.vim file in the "WXYZ" category:
                an 50.120.350 &Syntax.WXYZ.Xilinx\ UCF :cal SetSyn("ucf")
Now, as long as you have automatic syntax highlighting turned on in your _vimrc file keywords in opened UCF files will automatically highlight.
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Viewing SystemVerilog files with Syntax Highlighting in gVim?
Verilog HDL syntax highlighting is available in the gVim installation; however, a lot of new keywords have been added to the SystemVerilog language and the verilog.vim syntax file has not been updated. The SystemVerilog gVim syntax files can be downloaded from http://www.vim.org/scripts/script.php?script_id=1586. The installation details are shown below:
  1. Download the latest verilog_systemverilog.tar.gz from http://www.vim.org/scripts/script.php?script_id=1586.
  2. Untar the package verilog_systemverilog.tar.gz
  3. Copy verilog_systemverilog/ftdetect/verilog_systemverilog.vim to your <gvim_install_drive>:\Vim\vimfiles\ftdetect directory.
  4. Copy verilog_systemverilog/syntax/verilog_systemverilog.vim to your <gvim_install_drive>:\Vim\vimfiles\syntax directory.
  5. Copy verilog_systemverilog/indent/* to your <gvim_install_drive>:\Vim\vimfiles\indent directory.
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Jeremy W. Webb
Graduate Student
Electrical and Computer Engineering Department
One Shields Avenue
Davis, CA 95616