Welcome to my home page. Currently I am working on the Programmable Pattern Generator. My current responsibilities are digital hardware design. I'm working on state of the art FPGA designs using both Verilog HDL and SystemVerilog. I'm also designing digital pc boards.
Below are some links to useful design information:
Jeremy's UC Davis ECE Class Links:
- UC Davis ECE Masters of Science Plan I Program of Study LaTeX Template
- EEC 290: Seminar (Fall 2006 - 1 Unit)
- EEC 202: Advanced Digital Signal Processing (Spring 2006 - 4 Units) - Professor Jamal Tuqan.
- EEC 201: Digital Signal Processing (Winter 2006 - 4 Units) - Professor Jamal Tuqan.
- EEC 269A: Error Correction Codes (Fall 2005 - 3 Units) - Professor Shu Lin.
- EEC 116: VLSI Design (Spring 2005 - 4 Units) - Professor Bevan Baas.
- EEC 281: VLSI Digital Signal Processing (Winter 2005 - 4 Units) Class Site - Professor Bevan Baas.
- How to create a PDF file for EEC 281 Homework?
- EEC 289Q: Reconfigurable Computing (Fall 2004 - 4 Units) Class Site - Professor Soheil Ghiasi.
- EEC 289Q Project Page - Info on block diagrams, Verilog HDL code, and project results.
- Spring 2004 - Planned Educational Leave Program.
- EEC 206: Digital Image Processing (Winter 2004 - 4 Units) - Professor Gary Ford.
- EEC 170: Introduction to Computer Architecture (Fall 2003 - 4 Units) - Professor John Owens.
Jeremy W. Webb Graduate Student Electrical and Computer Engineering Department One Shields Avenue Davis, CA 95616