JUSTIN WENCK
OBJECTIVE
Electrical engineering position in the field of energy efficient circuits and systems.
EDUCATION
Ph.D. in Electrical Engineering, GPA 3.96, Summer 2010 (Expected)
University of California, Davis
M.S. in Electrical Engineering, GPA 3.96, September 2009
University of California, Davis
B.S. in Electrical Engineering, Summa Cum Laude, GPA 3.95 June 2004
California Polytechnic State University-San Luis Obispo
Engineer-In-Training #117478
TECHNICAL SKILLS
Programming Languages: C, Assembly, Perl, Verilog, Verilog-A, Verilog-AMS, VHDL, SKILL, Visual Basic, LaTeX, and Matlab.
Programs: Matlab, Simulink, Maple, Visio, Hspice, Cadence Tools, Virtuoso AMS Designer, Virtuoso Analog Design Environment, Virtuoso Layout Suite, Virtuoso Spectre Circuit Simulator, Synopsys VCS, Synopsys Nanosim, Mentor Graphics Calibre, Mentor Graphics PADS, Xilinx ISE WebPACK, Micro-Cap, OrCad Pspice, and Microsoft Office.
Operating Systems: Windows, Unix, and Linux.
Test Equipment: Oscilloscopes, logic analyzers, spectrum analyzers, and network analyzers.
EXPERIENCE
University of California, Davis, CA, March 2005-Present
Research Assistant, Micropower Circuits and Systems Group
Researched, documented, published, and presented in the area of microscale energy harvester powered circuits and systems.
- Met MOSIS deadline to finish proof-of-concept AC supply powered custom IC.
- Designed, populated, soldered a PCB ttest and characterize a custom IC.
- Consulted with vendors tselect test equipment and parts.
- Troubleshot custom IC and FPGA programming and testing failures.
- Reduced custom IC test time by automating test procedures.
- Created new SRAM and DRAM cell designs for AC powered digital systems.
- Modeled and evaluated design space for volume constrained systems.
- Presented research findings at international conferences.
- Reduced time tlearn and use CAD tools for research group members by documenting tool flows on research group Wiki.
- Managed 3 junior graduate students tcomplete 90nm digital CMOS standard cell library.
- Trained and mentored both undergraduate and graduate students in related, but independent, research projects.
- Improved 90nm digital CMOS design flow by editing the Calibre LVS rule deck.
University of California, Davis, CA, September 2006 - June 2007
Teaching Assistant, Electrical and Computer Engineering Department
Taught, monitored and evaluated up to 30 undergraduates in digital electronics labs. Graded lab work and exams.
- Improved student lab performance by creating and giving lectures before lab.
Teradyne, Inc., Agoura Hills, CA, June 2002 - December 2002
Test Development Engineering Co-op
Supported Test Development Engineers in creating test procedures for automated test equipment.
- Troubleshot and repaired high speed digital boards at the component level.
- Worked on a multidisciplinary team to help resolve automated test equipment failures.
- Created Perl and Excel scripts to automate common tasks in both Windows and UNIX environments.
- Commented on usability of software, documents, and processes created by other engineers.
- Measured active and passive trace lengths on boards for calibration.
- Built and modified a custom digital pressure regulator for use on the production floor.
PROFESSIONAL AFFILIATIONS
IEEE Graduate Student Member (Cal Poly Student Branch Officer, 2001-2003)
IEEE Solid-State Circuits Society
Electrical and Computer Engineering Graduate Student Association (Officer, 2006-2007)
Eta Kappa Nu (Vice President of Epsilon Phi chapter, 2003-2004)
Golden Key
International Society of Collegiate Scholars
SERVICE ACTIVITIES
- Reviewed 2 journal articles for IEEE Transactions on Power Electronics and a book chapter on RFID systems.
- Volunteered at UC Davis, Electrical and Computer Engineering Department annual recruitment weekend 2005-2009.
AWARDS and HONORS
Graduate Assistance in Areas of National Need (GAANN) Fellowship
2007 Summer Graduate Student Researcher Award
UC Davis Block Grant Fellowship recipient 2008 and 2009