EEC 281 Example Code
This page contains code of a more general nature that may be helpful
in 281 hwk/projects.
If you suspect you found a bug here, email me (Bevan Baas) and let
me know!
Verilog
Verilog modules
- fourtwos_32.v --
This module connects 32 4:2 adders.
Use it for this purpose or as a starting point to generate rows of
4:2 adders of other widths. (unverified, but looks correct)
- threetwos_32.v --
This module connects 32 3:2 adders connected in a carry-save
arrangement. (unverified, but looks correct)
Updates
2006/02/28 First pass
Written by Bevan Baas