![[Aaron Stillmaker]](aaron2.jpg)
Aaron Stillmaker
Ph.D. Student at the University of California, Davis
VLSI Computation Lab
Advisor: Dr. Bevan Baas
Office:
2211 Kemper Hall
ECE Department
University of California, Davis
Davis, CA 95616
Email:
astillmaker -a,t- ucdavis -period- edu
Brief Bio:
Aaron Stillmaker is a Ph.D. student in the VLSI Computation Lab in the
Electrical and Computer Engineering Department at the University of
California, Davis. Aaron was born and raised in Fresno, CA and recieved
his BS degree in 2008 in Computer Engineering from the California State
University, Fresno in the Smittcamp Family Honors College.
Durring his undergraduate work he held a long term internship at Pelco Inc.
Education
Research Interests:
Processor Architecture
DSP Applications
VLSI Design
Many-Core Processor Applications
Parallel Enterprise Workloads
Parallel Database Sorting Algorithms
Publications and Presentations:
- Aaron Stillmaker, Lucas Stillmaker, Brent Bohnenstiehl and Bevan M. Baas,
"Energy-Efficient Sorting on a Many-Core Platform,"
To Appear: Technology and Talent for the 21st Century
(TECHCON 2013),
Austin, TX, September 2013.
- Aaron Stillmaker,
"Energy-Efficient Sorting on a Many-Core Processor Array,"
Invited talk. Oracle (Sun Microsystems).
Santa Clara, CA, March 12, 2013.
- Aaron Stillmaker, Lucas Stillmaker and Bevan M. Baas,
"Fine-Grained Energy-Efficient
Sorting on a Many-Core Processor Array,"
IEEE International Conference on Parallel and Distributed Systems
(ICPADS 2012),
Singapore, December 2012.
- Aaron Stillmaker, and Bevan M. Baas,
"Modular Sorting on a
Fine-Grained Many-Core Processor Array,"
UC Davis ECE Department Industrial Affiliates Conference 2012, Davis, CA, June 2012.
- Aaron Stillmaker, Zhibin Xiao and Bevan M. Baas,
"Toward More
Accurate Scaling Estimates of CMOS Circuits from 180 nm to 22 nm,"
Technical Report ECE-VCL-2011-4,
VLSI Computation Laboratory,
ECE Department,
University of California, Davis, December 2011.
- Aaron Stillmaker, Zhibin Xiao, Bin Liu, and Bevan M. Baas,
"Computing Enterprise Workloads With Many-Core Arrays and Special-Purpose Processors,"
C2S2 Annual Review, Atlanta, GA, October 2011.
- Aaron Stillmaker, Zhibin Xiao, and Bevan M. Baas,
"Computing Enterprise Workloads With Many-Core Arrays and Special-Purpose Processors,"
C2S2 Annual Review, Atlanta, GA, October 2010.
Projects:
Current:
Physical design of 3rd generation VCL many-core processor array.
Designing parallel database sorting algorithms for the AsAP2
chip.
Past:
Characterizing the scaling of power and delay as technology
sizes scale, so as to make better comparisons to circuitry in
different techology sizes.
Report
Researching enterprise workloads suitable for a fine-grained many-core processor array
C2S2
Wrote a dual clock FIFO in Verilog for communication between
two different clock frequencies.
Dual Clock FIFO
Teaching:
TA: EEC 116
(VLSI Design), Fall 2012, for Dr. Bevan Baas
TA: EEC 70 (Computer Structure and Assembly Language), Winter 2011, 2012, and 2013, for Dr. Venkatesh Akella
TA: ENG 6 (Engineering Problem Solving), Spring 2011, for Dr. Bevan Baas
Professional Services:
- Reviewer for IEEE Journal of Solid-State Circuits (JSSC)
- Reviewer for IEEE Design and Test of Computers
- Reviewer for IEEE/ACM International Symposium on Microarchitecture (MICRO)
- Reviewer for IEEE International Conference on Computer Design (ICCD)
- Chapter Advisor for CA-L Tau Beta Pi Chapter at UC Davis
Links:
University of California, Davis
ECE Department: UC Davis
VCL Group: ECE Dept.: UC Davis
Dr. Bevan Baas
This page was last modified on March 14, 2013.
Keywords:A. Stillmaker, Aaron Stillmaker