A networks-on-chip (NoC) simulator allows designers to early estimate performance (latency and throughput), energy efficiency (average/peak power, average energy per packet) and area of several networks on-chip configurations. This tool is open-source using SystemC, a C++ plugin, which is used to quickly model complex systems at a higher level but less details than RTL.
NoCTweak is a cycle-accurate simulator with power and area parameters are taken from both commercial and PTM CMOS processes from 180nm downto 22nm. Scaling rules are based on ITRS.
Features (version v1.0)
- read network settings from both commandline and/or configuration files
- simulate both 3D and 2D networks
- benchmarks: synthetic, real/embedded applications, multithread traces
- topologies: mesh, torus, ring
- router architectures: wormhole, virtual channel, circuit-switched, shared queues
- routing algorithms: deterministic, adaptive, table-based
- arbitrating policies: round-robin, iSLIP, winner takes all
- variable pipeline stages
(Please drop me an email for getting the latest version of NoCTweak. Thank you!)
Stable version (v0.70)
Coming soon (v1.0)
(If you find NoCTweak to be useful for your reseach,
please cite the technical report below in your related publications.
We appreciate your collaboration.)
Anh Tran and Bevan Baas,
a Highly Parameterizable Simulator for Early Exploration of Performance
and Energy of Networks On-Chip,"
Technical Report, VLSI Computation Lab, ECE Department, UC Davis, July 2012.
A tool allows programmers to quickly map, test and measure multi-task applications on the AsAP many-core platform. The tool helps avoiding bugs and hard-detected mistakes by programming without GUI. This tool is contributed by Emmanuel Adeagbo and Anh Tran.
Stable version (v0.92)
Comming soon (v1.0)