AsAP: A Fine-grain Multi-core Platform for DSP Applications

Bevan M. Baas
Zhiyi Yu
Michael Meeuwsen
Omar Sattari
Ryan Apperson
Eric Work
Jeremy Webb
Michael Lai
Tinoosh Mohsenin
Dean Truong
Jason Cheung
VLSI Computation Laboratory
Department of Electrical and Computer Engineering
University of California, Davis

Abstract:

Many emerging and future applications require significant levels of
complex digital signal processing and operate within limited power
budgets. Moreover, dramatically rising VLSI fabrication and design
costs make programmable and reconfigurable solutions increasingly
attractive. The AsAP project addresses these challenges with a chip
multiprocessor composed of simple processors with small memories,
achieving high energy efficiency and throughput in a small chip area.

Paper

Reference

Bevan Baas, Zhiyi Yu, Michael Meeuwsen, Omar Sattari, Ryan Apperson, Eric Work, Jeremy Webb, Michael Lai, Tinoosh Mohsenin, Dean Truong, Jason Cheung "AsAP: A Fine-grain Multi-core Platform for DSP Applications," IEEE Micro, Volume 27, Number 2, March/April 2007.

BibTeX Entry

@ARTICLE{Baas:MICRO:2007,
   author={Baas, B. and Zhiyi Yu and Meeuwsen, M. and Sattari, O. and Apperson, R. and Work, E. and Webb, J. and Lai, M. and Mohsenin, T. and Truong, D. and Cheung, J.},
   journal={Micro, IEEE}, 
   title={{AsAP}: A Fine-Grained Many-Core Platform for {DSP} Applications},
   year={2007},
   month={Mar.},
   volume={27},
   number={2},
   pages={34-45},
   doi={10.1109/MM.2007.29},
   ISSN={0272-1732}
}

VCL Lab | ECE Dept. | UC Davis

Last update: Sep. 27, 2010