A 9.5 mW 330 μsec 1024-point FFT Processor

Bevan M. Baas
Department of Electrical Engineering
Stanford University
Stanford, CA

Abstract:

This paper presents an energy-efficient, single-chip, 1024-point FFT processor. The full-custom, 460,000-transistor design has been fabricated in a standard 0.7 μm (L_poly = 0.6 μm) CMOS process and is fully functional on first-pass silicon. At a supply voltage of 1.1 V, it calculates a 1024-point complex FFT in 330 μsec at a clock speed of 16 MHz while consuming 9.5 mW, resulting in an adjusted energy efficiency more than 16 times greater than the previsouly most-efficient known FFT processor. At 3.3 V, it operates at 173 MHz.

Paper

Reference

Bevan M. Baas, A 9.5 mW 330 μsec 1024-point FFT Processor," IEEE Custom Integrated Circuits Conference (CICC), May 1998.

BibTeX Entry

@inproceedings{baas:cicc:1998,
   author    = {Bevan M. Baas},
   title     = {A 9.5 mW 330 {\mu}sec 1024-point {FFT} Processor},
   booktitle = {IEEE Custom Integrated Circuits Conference},
   month     = may,
   year      = 1998,
   pages     = {127--130}
   }

Alternate Title Spelling

A 9.5 mW 330 usec 1024-point FFT Processor



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