Getting Started in the VCL Lab

1. Get added to the VCL netgroup (allow logins to VCL machines etc.)

Dr. Baas will update group files and send the following email to IT support.

Please update the VCL netgroups.
  /afs/ece.ucdavis.edu/labs/vcl/admin/

2. Get added to vcl@ucdavis.edu email list

Dr. Baas will add you using this link.

3. Get access codes to the labs (Kemper 2201 and 2211)

4. Set up your ~/.cshrc file

• Inside of your home directory of your ECE account, check if your
  ~/.cshrc file exists. If not, get a copy of someone else's .cshrc file and edit it.
  
• Add the following lines to your .cshrc file:
  setenv PPD_PATH path_to_your_copy
  source /net/pizza/tools/bin/DOT.cshrc
  set CVSROOT /net/pizza/vcl/ppd_cvs
  
  
• path_to_your_copy needs to be replaced with the location where you will store your copy of the checked out CVS tree.
  Ex: setenv PPD_PATH /net/pepper/tmp2/username

5. Add Synopsis to your .software file

• Add the following line to your ~/.software file (create the file if needed):
  synopsys2004

6. Set default unix group to "vcl" (so file group ownership is correct)

Send an email to support@ece.ucdavis.edu and request that they set your primary unix group to "vcl".

Only if it would be very convenient to have your default group set immediately, you may want to do the following steps and then undo them after support makes the change.

1. Add the following line to your ~/.login file (create the file if needed): newgrp vcl
2. Logout and log back in. Check your primary group by typing 'groups' and press Enter. The default group is the first one listed.
   
3. Once support adds you to the primary unix group "vcl", remove the "newgrp vcl" line from your .login file.
   While "newgrp vcl" is in your .login file, each time you login, two shell instances will be spawned.
   Thereby requiring you to exit twice before you are fully logged out.
   

7. Add the Matlab path to your .login file

• Add the following to your ~/.login file:
  if ( ! $?MATLABPATH ) then
  setenv MATLABPATH ":/net/pizza/vcl/matlab/"
  else
  setenv MATLABPATH $MATLABPATH":/net/pizza/vcl/matlab/"
  endif
  

8. Add AsAP-ASM syntax highlighting to your nedit.rc file (less important in 2013)

1. Run "nedit -import /net/pizza/tools/bin/DOT.nedit"
   
2. Click "Preferences" -> "Save Defaults" -> "OK"
   
3. Restart nedit by running "nedit"
   

9. Check out a CVS tree

• To check out the entire ppd "module" (aka directory):
  Go to your path_to_your_copy directory (From step II) and execute the command:
  cvs checkout ppd
  
• This will create a dir named "ppd" which is the top level of the cvs tree.
  
  
• For more information regarding CVS, refer to the CVS Help File
  

10. Check out an SVN tree

• To check out the asap2 svn tree:
  svnco
  
• To update the asap2 svn tree:
  svn update
  
• To add files into the asap2 svn tree:
  svn add PATH
  svn commit
  
• For more information regarding SVN, refer to the Basic SVN Commands
  

11. Obtain access to VCL web space (on AFS file system)

• Ask Prof. Baas to give afs permission to you:
  klog
  cd /afs/ece.ucdavis.edu/labs/vcl/
  fsr sa /afs/ece/labs/vcl/WebPage/ UserName write
• Authenticate with "klog" using instructions found on the web page: http://www.ece.ucdavis.edu/support/ > Your ECE account > AFS
• Once you are authorized to use the web space, just "cd" to that directory, type "klog", and type your kerberos password.
  If the authorization went correctly you should then be able to change and add files within that directory.
  

12. Web page items

1. Get a picture for the main VCL web page
   Get someone to take a friendly smiling picture of you against a partition in 2211. Wear a professional-looking collared buttoned-up dress shirt. A dress shirt with a dress jacket is ideal for Ph.D. students. No tie needed. Crop like the other pictures, scale to 108 pixels wide x 144 pixels tall, balance the colors (Colors > Levels > Auto, in gimp), and put it on the VCL home page.

2. Set up a personal web page
   Set up a web page in your home directory and link to that page from your picture and name on the VCL home page. For now, a simple page with the basics such as your picture, contact info, affiliation, brief bio, and research interests is fine. Make your main page professional looking and put more personal content on other pages. Do not put unprofessional things (difficult to define) on any pages. Your web page reflects on everyone in the group.

13. Setup a google calendar

Keep your schedule on a google calendar showing all days Mon-Fri away from research and share it with me. You may want to start two calendars if you would like to put a lot of non-work-related information on your calendar.

14. Register with SRC

Print and complete an SRC New Student Form, bring to Dr. Baas to sign, scan, and email to Lee Ann Clewell at LeeAnn.Clewell@src.org     SRC is a research consortium that helps fund our research and occasionally they have e-Workshops online where you can watch presentations of other researcher's work.

15. Read some of our introductory papers

• Bevan Baas, Zhiyi Yu, Michael Meeuwsen, Omar Sattari, Ryan Apperson, Eric Work, Jeremy Webb, Michael Lai, Tinoosh Mohsenin, Dean Truong, Jason Cheung, "AsAP: A Fine-grain Multi-core Platform for DSP Applications," IEEE Micro, Volume 27, Number 2, March/April 2007. Invited.

• Zhiyi Yu, Michael Meeuwsen, Ryan Apperson, Omar Sattari, Michael Lai, Jeremy Webb, Eric Work, Tinoosh Mohsenin, Mandeep Singh, Bevan M. Baas, "An Asynchronous Array of Simple Processors for DSP Applications," In Proceedings of the IEEE International Solid-State Circuits Conference (ISSCC '06), February 2006, pp. 428-429, 663.

• Zhiyi Yu, Michael Meeuwsen, Ryan Apperson, Omar Sattari, Michael Lai, Jeremy Webb, Eric Work, Dean Truong, Tinoosh Mohsenin, Bevan Baas, "AsAP: An Asynchronous Array of Simple Processors," IEEE Journal of Solid-State Circuits (JSSC), vol. 43, no. 3, pp. 695-705, March 2008.

• Dean Truong, Wayne Cheng, Tinoosh Mohsenin, Zhiyi Yu, Toney Jacobson, Gouri Landge, Michael Meeuwsen, Christine Watnik, Paul Mejia, Anh Tran, Jeremy Webb, Eric Work, Zhibin Xiao, Bevan Baas, "A 167-processor 65 nm Computational Platform with Per-Processor Dynamic Supply Voltage and Dynamic Clock Frequency Scaling," In Proceedings of the Symposium on VLSI Circuits, June 2008, C3.1., pp. 22-23.

• Dean Truong, Wayne Cheng, Tinoosh Mohsenin, Zhiyi Yu, Anthony Jacobson, Gouri Landge, Michael Meeuwsen, Christine Watnik, Anh Tran, Zhibin Xiao, Eric Work, Jeremy Webb, Paul Mejia, Bevan Baas, "A 167-Processor Computational Platform in 65 nm CMOS," IEEE Journal of Solid-State Circuits (JSSC), vol. 44, no. 4, pp. 1130-1144, April 2009. Invited.

• Some of our complex application papers such as: 802.11a/11g transmitter, 802.11a/11g receiver, H.264 residual encoder, and AES encryption engines.