8 How can I get my lsi design fabbed and how much will it cost?

See section on mosis fabrication services as well.

(From MUG 20 George Lewicki of Orbit Semiconductor)

Orbit Semiconductor operates an integrated circuit prototyping service that accepts designs each week for all of its processes. The service is available to both U.S. and non-U.S. designers. In- quiries about the FORESIGHT prototyping service should be ad- dressed to George Lewicki. Designs can now be submitted directly via email.

    Orbit Semiconductor, Inc.
    1215 Bordeaux Drive
    Sunnyvale, CA 94089
    TEL: (408)-744-1800
    FAX: (408)-747-1263
    Email: foresight@orbsemi.com
(Contributed by Don Bouldin of the University of Tennessee)

Recently, I contacted several foundries to determine which com- panies are interested in fabricating small to moderate lots of wafers for custom CMOS designs. I believe many of the readers of this column are designers who wish to have fabricated only 1,000 to 20,000 parts per year. There are currently several prototyp- ing services (e.g. MOSIS and Orbit) that can produce fewer than 100 parts for about $100 each and there are also several foun- dries which are willing to produce 100,000 custom parts for $5- $20 each (depending on the die size and yield). My purpose was to identify those companies filling the large gap between these two services.

The prices in the table below are a result of averaging the data supplied by four foundries. The raw data varied by more than +/- 40% so the information should be used only in the early stages of budgetary planning. Once the design specifications are fairly well known, the designer should contact one or more foundries to obtain specific budgetary quotes. As the design nears comple- tion, binding quotes can then be obtained.

The following assumptions were made by the foundries:

All designs will require custom CMOS wafer fabrication using a double-metal, single-poly process with a feature size between 2.0 and 1.2 microns. The designs may contain some analog circuitry and some RAM so the yield has been calculated pessimistically. The dies will be packaged and tested at 1 MHz using a Sentry- type digital tester for 5-10 seconds per part. The customer will furnish the test vectors.

Piece Price includes Wafer Fabrication+Die Packaging+Part Testing
Size        Package                      Quantity
                       |1,000 | 5,000 | 10,000 | 20,000  |100,000
-----------------------------------------------------------------
2 mm x 2 mm; 84 PLCC:  | $ 27 | $  6  |  $  5  |  $  4   | $  3 |
5 mm x 5 mm; 84 PLCC:  | $ 31 | $ 12  |  $  8  |  $  7   | $  6 |
5 mm x 5 mm; 132 PGA:  | $ 49 | $ 30  |  $ 25  |  $ 22   | $ 18 |
7 mm x 7 mm; 132 PGA:  | $ 65 | $ 44  |  $ 36  |  $ 31   | $ 27 |
Lithography charges:  $ 20,000 - $ 40,000
Preferred Formats:  GDS-II or  CIF Tapes
Additional charges for Second-Poly:  $ 5,000
(This is from MUG 19, there is also a list of foundries that these prices were derived from. In the interested of saving space, I have ommitted the list. The list is available from MUG's ftp site included in MUG newsletter #19.)

This document was translated by ms2html v1.7 on 16.01.97. OMN

[an error occurred while processing this directive]