58 TDX Fault Simulation and Test Generation Software

(from Dan Holt <dan@attest.com>)

TDX Fault Simulation and Test Generation Software

Free demo/student copies of Attest Software's fault simulation, Iddq, DFT, and automatic test pattern generation tools are available by anonymous ftp.

This software is fully functional on any circuit with less than 200 gate-level primitives. It is also fully functional on the GL85 microprocessor circuit (about 3000 primitives) which is included with the suite of tools. General-use licenses can be provided free to accredited universities for non-commercial, educational purposes.

The software is built around a high-performance concurrent fault simulator that is accurate on a wide-range of state and timing sensitive circuits. It supports synchronous and asynchronous designs containing logic gates, MOS transistors, tri-state buffers, flip-flops, single/multi-port RAMs, complex bus resolution functions, and Verilog User Defined Primitives (UDPs). The software also supports the detailed pin timing and strobing features found on "tester-per-pin" automatic test equipment. The software supports Verilog and VHDL netlists.

The GL85 microprocessor, which is a clone of the once-popular 8085 microprocessor, is a fully functional model for which three views are provided: behavioral, RTL, and gate level. Using this clone, a tutorial shows the user how to achieve improved controllability and/or observability for his or her circuit, resulting in improved fault coverage, sometimes with very little additional time or effort expended in the design cycle. The tutorial was written by Dr. Alex Miczo.

The software is available by ftp at:

<URL:ftp://ftp.attest.com/pub/attest>
<URL:http://www.attest.com/>
Attest Software Inc.
47100 Bayside Parkway
Fremont CA 94538-9942  USA
(510) 623-4253  voice
(510) 623-4550  fax
info@attest.com

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