44 Tanner Research Tools (Ledit and LVS)

(Contact sales@tanner.com)

Low cost, yet very powerful commercial ASIC design tools are available from Tanner Research, Inc. in Pasadena, CA. These products are used by industry and universities alike. Tanner's products are nominally priced at $995 per program, with a combined package named L-Edit Pro available for $3,495 on the PC. Universities are offered a 75% discount. Here is a list of their current programs:

L-EditTM :      A full-custom layout editor with CIF and GDSII
                input/output.  Features a 32-bit coordinate space,
                all-angle geometry, unlimited hierarchy and number
                of layers.  The L-Edit Pro package includes L-Edit/DRC
                for design rule checking, L-Edit/SPR for automatic
                standard cell placement and routing, L-Edit/Extract
                for extracting transistors, capacitors, resistors and
                generic devices for SPICE-level simulation or comparison
                to a schematic and LVS ,a netlist comparison tool for
                topological and parametrical verification.  Optional
                layout libraries are also available.
T-Spice:        Circuit level simulator (See item 41 for detail
GateSimTM :     Gate-level simulator.  A full array of technology mapping
                libraries are also available.   
Products are available for the PC, Macintosh, Sun and Hp UNIX platforms. For more information contact Bhushan Mudbhary at Tanner Research (bhushan @
tanner.com), phone 818-792-3000 and fax 818-792-0300.

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