37 Test Generation and Fault Simulation Software

(Contributed by Dr. Dong Ha of Virginia Tech)

Two automatic test pattern generators (ATPGs) and a fault simula- tor for combinational circuits were developed at Virginia Tech, and the source codes of the tools are now ready for public release. ATLANTA is an ATPG for stuck-at faults. It is based on the FAN algorithm and a parallel-pattern, single-fault propaga- tion technique. It consists of optional sessions using random pattern testing, deterministic test pattern generation and test compaction. SOPRANO is an ATPG for stuck-open faults. The algo- rithm of SOPRANO is similar to ATLANTA except two consecutive patterns are applied to detect a stuck-open fault. FSIM is a parallel-pattern, single-fault simulator. All the tools are written in C. The source codes are fully commented, and README files contain user's manuals. Technical papers about the tools were presented at DAC-90 and ITC-91. All three tools are free to universities. Companies are requested to make a contribution of $5000 but will have free technical assistance. For detailed in- formation, contact:

   Dr. Dong Ha
   Electrical Engineering
   Virginia Tech
   Blacksburg, VA 24061
   TEL: 703-231-4942
   FAX: 703-231-3362
   dsha@vtvm1.cc.vt.edu

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