BLIS (Behavior-to-Logic Interactive Synthesis) is an environment for the synthesis of digital circuits from high-level descriptions. Version 2.0 supports functional-level synthesis starting from the ELLA hardware description language. Other languages can easily be supported by interfacing a parser to the internal data-flow representation of BLIS.
BLIS is distributed through the Industrial Liason's Program (ILP) Office of the UCB EECS department. The cost of $250 covers media and distribution charges. Binaries are provided for SUN4 and DEC MIPS architectures but BLIS should compile on most other machines supported by the GNU C and C++ compilers (e.g. HP, vax, etc). ELLA language documentation and simulator are not supplied with the BLIS distribution, but can be obtained from Computer General.
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