Paul J. Hurst

Paul J. Hurst

Professor

Phone:
(530) 752-2054
Email:
Website:
http://www.ece.ucdavis.edu/~hurst

Education

Ph.D. in Electrical Engineering, University of California, Berkeley, CA, 1983
M.S. in Electrical Engineering, University of California, Berkeley, CA, 1979
B.S. in Electrical Engineering, University of California, Berkeley, CA, 1977

Professional Experience

Professor, University of California, Davis, 1995-present
Associate Professor, University of California, Davis, 1991-1995
Assistant Professor, University of California, Davis, 1986-1991
Design Engineer, Silicon Systems Inc., 1984-1986
Consultant on analog and mixed-signal IC design, 1986-present

Affiliation

Electrical and Computer Engineering Graduate Group

Research Interests

Analog and mixed-signal integrated circuit design for analog-digital interfaces and digital communications using CMOS technologies.

Research Activities

Target application areas are communication, magnetic-recording and signal-processing systems. Projects include data converters, analog filters, adaptive equalizers, sampling detectors and timing recovery. The key goals are to reduce the system cost and to improve system performance.

Selected Publications

P. J. Hurst and A. Norrell, "DAC quantization-noise cancellation in an echo-canceling transceiver," IEEE Trans on CAS II, pp. 111-115, Feb. 2008.

N. Guilar, R. Amirtharajah and P. Hurst, "A full-wave rectifier for interfacing with multi-phase piezoelectric energy harvesters," IEEE Int'l Solid-State Circuits Conf., pp. 302-303 and p. 615, Feb. 2008.

R. A. Hershbarger, W. Jia, K. M. Tey, K. Fukahori, P. J. Hurst, and M. Kapoor, "A programmable impedance matching circuit for voiceband modems," IEEE J. of Solid-State Circuits, pp. 468-476, Feb. 2008.

N. J. Guilar, F. P.-K. Lau, P. J. Hurst and S. H. Lewis, "A passive switched-capacitor finite-impulse-response equalizer," IEEE Journal of Solid-State Circuits, Vol. 42, No. 2, pp. 400-409, Feb. 2007.

T.-H. Tsai, P. J. Hurst and S. H. Lewis, "Bandwidth mismatch and its correction in time-interleaved analog-to-digital converters," IEEE Trans. on Circuits and Systems-II, Vol. 53, No. 10, pp. 1133-1137, Oct. 2006.