UCD's Professor Bevan M. Baas wins NSF CAREER Award

Dr. Bevan M. Baas received a CAREER award from the National Science Foundation for his proposal titled, "Processors for the Computation of Future Digital Signal Processing Applications".

The National Science Foundation's Faculty Early Career Development (CAREER) Program is a Foundation-wide activity that offers the Foundation's most prestigious awards in support of the early career-development activities of those teacher-scholars who most effectively integrate research and education within the context of the mission of their organization.

Abstract:

Applications requiring significant levels of Digital Signal Processing (DSP) are becoming increasingly commonplace--examples include GPS receivers, Wi-Fi wireless networking, 3D medical imaging, and cell phones. As these applications become increasingly sophisticated and more frequently portable, their performance and power dissipation requirements often exceed the capabilities of modern DSP processors. The goal of this research is to develop novel architectures, circuits, and software for high performance and low power DSP processors that meet the demands of emerging and future DSP applications, and that are also well-suited to future semiconductor fabrication processes. Research results are introduced into both undergraduate and graduate level courses and other investigators are involved in collaborative efforts. Results of this research are expected to enable new embedded, medical, environmental, and consumer applications.

To achieve project goals, the investigators develop DSP systems with features that are new on several levels. First, easily-scalable programmable building block processors with high performance and high energy efficiency are developed using innovative architectures, granularity, clocking, interconnection, and circuits. Second, efficient architectures are developed for shared blocks such as large memory arrays and special-purpose DSP processors, as well as methods for effectively integrating these blocks into the programmable DSP array. Third, software tools including a compiler and automatic mapping tools are developed to more easily program the system. Fourth, to demonstrate gains in performance and energy efficiency, the system is implemented in silicon, tested, and characterized.

Posted: April 25, 2006

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