Power and Performance In Digital VLSI Design

September 26, 2003
Professor Rajeevan Amirtharajah, Electrical & Computer Engineering, University of California, Davis


Abstract:
Among the challenges confronting today?s digital IC and system designer is balancing power consumption and performance. This tradeoff is increasingly important in high performance computing and networking systems as well as embedded and portable electronics applications. Future projections indicate that power will become a dominant design issue as semiconductor technology scales. In this talk, we will examine two systems operating in verydifferent power/performance contexts and the tradeoffs involved in their design. The first example explores the possibility of using energy from ambient mechanical vibration to power digital systems for collecting and processing sensor data. The low throughput requirements of this type of computation enables aggressive scaling of supply voltages and very low power solutions. We discuss implementations of transducers for converting mechanical vibration to electrical energy using discrete and MEMS technology, power electronics for conditioning transducer outputs, and an ultra low power DSP chip that is designed to implement a power scalable detection and classification algorithm for a wearable biomedical sensor. This chip demonstrates appropriate architectures and circuits for low to medium throughput sensor applications and consumes 560 nW at 1.5 V with a 1 kHz clock frequency. In the second example, we discuss electromagnetic coupling and pulse based modulation for high speed multi drop buses in computers and networking equipment. We describe a prototype 8 module memory bus operating at a 400 MHz symbol rate, with 4 bits of data encoded per symbol, resulting in 1.6 Gb/s/pair performance. The choice of modulation techniques, circuit styles, and interconnect implementation all impact the transceiver power consumption. The differential transceiver, designed in 3 metal 0.25 um CMOS, dissipates 40 mW peak power.


Bio:
Rajeevan Amirtharajah received the S.B. and M.Eng. degrees in 1994, and the Ph.D. degree in 1999, all in electrical engineering from the Massachusetts Institute of Technology, Cambridge, MA. From 1999 to 2002, he was a senior member of the technical staff at High Speed Solutions Corp., an Intel Company, Hudson, MA, now known as Intel Platform Technologies. He worked as an ASIC and mixed-signal circuit design consultant at SMaL Camera Technologies, Cambridge, MA, in 2003. In July 2003, he joined the Electrical and Computer Engineering department at the University of California, Davis, where he is currently an assistant professor. He is an inventor on ten United States patents. He is a member of IEEE, AAAS, and Sigma Xi.