EEC180B - Digital Systems II

5 units - Spring Quarter

Lecture: 3 hours

Laboratory: 6 hours

Prerequisite: EEC180A

Grading: Letter

Catalog Description: Computer-aided design of digital systems with emphasis on hardware description languages, logic synthesis, and field-programmable gate arrays (FPGA). May cover advanced topics in digital system design such as static timing analysis, pipelining, memory system design, and testing digital circuits.

Relationship to Outcomes:
Students who have successfully completed this course should have achieved:

Course Outcomes ABET Outcomes
An ability to apply knowledge of mathematics, science, and engineering A
An ability to design and conduct experiments, as well as to analyze and interpret data B
An ability to design a system, component, or process to meet desired needs within realistic constraints such as economic, environmental, social, political, ethical, health and safety, manufacturability, and sustainability C
An ability to identify, formulate, and solve engineering problems E
An ability to use the techniques, skills, and modern engineering tools necessary for engineering practice. K

Expanded Course Description

  1. Review of basic topics in logic design
    1. Boolean Algebra
    2. Combinational Logic Design and Optimization
    3. Flip-flops and Latches
    4. Sequential Logic Design and optimization
  2. Hardware Description Language
    1. Structural modeling
    2. Simulation Cycle
    3. Modeling data
    4. Register-Transfer Level (RTL) modeling
  3. Computer-aided design of digital circuits
    1. Design Flow
    2. Functional Simulation
    3. Overview of logic synthesis and technology mapping
    4. Timing Simulation
  4. Field Programmable Gate Arrays
    1. Architecture of FPGA
    2. Programmable logic blocks and Programmable interconnect schemes
    3. FPGA-based design flow
  5. Timing Analysis and Clocking Schemes
    1. Static timing analysis concepts
    2. Edge-triggered flip-flops
    3. Level-sensitive latches
  6. Design Implementation and Optimization
    1. Control/Data Separation
    2. Pipelining
    3. Retiming
  7. Memory System Design
    1. SRAM
    2. DRAM
    3. Interfacing Memory to a Microprocessor Bus
  8. Advanced Topics (Optional)
    1. Processor Design
    2. Arithmetic Circuit Design
    3. Hardware Testing and Design for Testability

Textbook: P. Ashenden, Digital Design (An Embedded Systems Approach) Using Verilog, Morgan Kaufmann Publishers.

Computer Use: The class will require extensive use of computers.

Example Laboratory Projects:

  1. introduction to Computer-Aided Design (CAD) software tools and FPGA prototyping
  2. Combinational Logic and Arithmetic Circuits
  3. State Machine Design
  4. On-chip Memory System Design/ALU Design
  5. Floating-Point Unit Design
  6. Processor Design

Engineering Design Statement:
The course involves the design, implementation, and verification of a digital system, such as a simple microprocessor. In the first week, the students will learn the CAD tools by way of tutorials. In the following laboratory periods the students will design the various components of the system. In the last two weeks of class the students will implement the design on a FPGA and verify its operation. The students will use tools for design entry, functional simulation, logic synthesis, timing analysis, and FPGA mapping. The course practices modern design methodologies for FPGA-based design and has significant design content.

Professional Component: Engineering Depth, Laboratory
Engineering Science: 3 units
Engineering Design: 2 units