EEC146B - Advanced Integrated Circuits Fabrication
3 units - Winter Quarter (not offered 2013-2014 adcademic year)
Lecture: 2 hours
Laboratory: 3 hours
Prerequisites: Course 146A. Restricted to the
following majors: EE, CE, EE/MSE, EE Grads. Non-majors will be
accommodated on a space-available basis.
Grading: Letter
Catalog Description: Fabrication processes for
CMOS VLSI. Laboratory projects examine deposition of thin films, ion
implantation, process simulation, anisotropic plasma etching, sputter
metallization, and C-V analysis. Topics include isolation, projection
alignment, epilayer growth, thin gate oxidation, and rapid thermal
annealing.
Relationship to Outcomes:
Students who have successfully completed this course should have achieved:
| Course Outcomes | ABET Outcomes |
| An ability to apply knowledge of mathematics, science, and engineering | A |
| An ability to design and conduct experiments, as well as to analyze and interpret data | B |
| An ability to function on multidisciplinary teams | D |
| An ability to identify, formulate, and solve engineering problems | E |
Expanded Course Description
- VLSI Processes
- Low-pressure chemical vapor deposition (LPCVD)
- Silicon, silicon dioxide, and silicon nitride thin films
- Device isolation by local isolation (LOCOS) and trench
- Epitaxial layer growth, film thickness optimization
- Vacuum systems: selection, design, and application
- Glow discharge processing
- Isotropic plasma etching, reactive ion etching (RIE), ion milling
- Ion implantation and graded impurity profiles
- Projection alignment and stepping
- Submicron structure processing using electron beam lithography
- Mid-UV proximity alignment
- Mask making for different aligner sources
- Thin gate dielectric growth
- Rapid thermal annealing. criteria for selecting run times
- Sputter deposition of metals and silicide formation
- Factors pertaining to formulating new processes
- Process Characterization Techniques
- Van der Pauw structures, Hall devices, and data interpretation techniques
- C-V and C-t analysis of MIS diodes
- Process simulation using SUPREM, energy and range selection criteria
- Step profilometry
- Light and dark field and interference-contrast optical microscopy
- Spreading resistance measurement
- Mass spectrometry and RGA end point detection
- Chemical defect etching
- Reliability Issues
- Electromigration elimination
- Hot carrier degradation and practical solutions
- Bird's beak
- Alpha-hit protection
- Latchup
- Body effect
- Punch-through
- Practical methods for eliminating failure mechanisms
Textbook: S. Ghandi, VLSI Fabrication Principles, Wiley.
Reference: S.Wolf and R. Tauber, Silicon Processing, Wiley.
Computer Use:
Three laboratory projects and two problem sets require the
use of turn-key process simulation software, SUPREM-III. This operates
on UNIX-based computers. Students need to generate an input file with
the text editor and plot/print program results using various output
devices.
Laboratory Projects:
Ten weekly three hour laboratory projects, corresponding to
major technologies used in modern CMOS fabrication. Any fabrication
procedures used in any given week's lab correspond to the technology
being presented in the lectures that week, thereby providing immediate
hands-on experience. A major project in design, fabrication and testing
of MOS CV and C-t test devices extends over several lab sessions.
Design by using CAD software and testing of devices fabricated
according to these designs is a key issue.
Engineering Design Statement:
Students are required to specify appropriate desirable
operating performance, with justification, of the final device and
design the process used to obtain that performance. Problems in the
class are open-ended with different approaches being valid according to
initial conditions of the IC and the technology chosen. Students learn
to design a process to optimize performance and yield, and minimize
complexity and parasitic effects. Students are required to compare
theory with experimental results and to justify the differences. They
are furthermore required to predict where digression from theory is
likely to occur and account for this in setting fabrication operating
parameters. Several issues of design are beyond simple analysis and
therefore require CAD tools. Students must make judgements in setting
process variables within the practical confines of the fabrication
equipment they will be using.
Professional Compoenent: Engineering Depth, Laboratory
Engineering Science: 1 unit
Engineering Design: 2 units