EEC116 - VLSI Design


4 units - Fall Quarter

Lecture:3 hours

Laboratory: 3 hours

Prerequisites: Courses 110A, 180A

Grading: Letter

Catalog Description: CMOS devices, layout, circuits, and functional units; VLSI fabrication and design methodologies.

Relationship to Outcomes:
Students who have successfully completed this course should have achieved:

Course Outcomes ABET Outcomes
An ability to apply knowledge of mathematics, science, and engineering A
An ability to identify, formulate, and solve engineering problems E

Expanded Course Description:
  1. CMOS devices
    1. NMOS transistor, basic characteristics
    2. PMOS transistor, basic characteristics
    3. Threshold voltage
    4. Body effect
    5. Basic DC equations
  2. VLSI Fabrication Technologies
    1. Silicon wafer processing steps
    2. Bulk MOS transistor fabrication
    3. Interconnect
    4. Design rules
    5. Other technologies: multiple wells, SOI, bipolar
  3. Simple CMOS Circuits
    1. Static SMOS inverter
    2. Transistor sizing
    3. Noise margin
    4. Gate delay
    5. Power dissipation
    6. Transmission gate
  4. Other CMOS Circuits
    1. More complex logic static gates
    2. Overview of dynamic circuits
  5. Design Methodologies
    1. Modeling transistors
    2. Modeling interconnect and loads
    3. Circuit simulation using SPICE
    4. Full-custom circuit layout using MAGIC
  6. Design of More Complex Structures
    1. Arithmetic circuits
    2. Memories
    3. Chip I/O
    4. Power distribution

Textbook: J. Rabaey, A. Chandrakasan, and B. Nikoli, Digital Integrated Circuits: A Design Perspecitve, Prentice Hall. 

Computer Use and Laboratory Projects:
Students will use Magic or Candence layout tools on several homework projects. These projects will include substantial design at various levels including chip level, functional unit, circuit, and physical layout.

Engineering Design Statement:
Students will be required to work in groups on a project consisting of the full-custom layout of a VLSI block including circuit and logic design. The design must meet functional and minimum performance requirements and will be judged by its performance, area, and power dissipation.

Professional Component: Engineering Depth, Laboratory, Project
Engineering Science: 2 unit
Engineering Design: 2 units

Overlap Statement:
There is a small amount of overlap with EEC 118 (about 10%), but this course has an entirely different focus. EEC 118 deals with detailed transistor-level digital circuits while this course focuses on very large scale integrated circuit (VLSI) design issues.