EEC216 - Low Power Digital Integrated Circuit Design3 units - Winter Quarter
Lecture: 3 hours
Prerequisites: Course 118
Grading: Letter; based on Homework (15%), Midterm (25%), Design Project #1 (20%), Final Project/Design Project #2 (40%).
Catalog Description: IC design for low power and energy consumption. Low power architectures, logic styles and circuit design. Variable supply and threshold voltages. Leakage management. Power estimation. Energy sources, power electronics, and energy recovery. Applications in portable electronics and sensors. Thermodynamic limits.
Expanded Course Description
- Overview of Low Power Design
- CMOS Power Dissipation
- Power and Performance Tradeoffs
- Trends in IC Power Consumption
- Low Power Architectures
- Clock Gating and Clock Management
- Pipelining to Reduce Supply Voltage
- Parallelization to Reduce Supply Voltage
- Low Power Circuit Design
- Logic Power Estimation
- Power Minimization in Static CMOS
- Power Minimization in Dynamic CMOS
- Multiple-Threshold CMOS
- Variable Supply and Threshold Voltages
- Managing Leakage
- Silicon-on-Insulator(SOI) Technologies
- Energy Recovery
- Interconnect Power Estimation and Management
- Energy Sources and Power Electronics
- Batteries and Fuel Cells
- Energy Scavenging
- DC/DC Converters: Fundamentals
- DC/DC Converters: Optimization
- Other Topics in Low Power Design
- Low Power Synthesis
- Applications: Computing, Communication and Multimedia
- Applications: Sensors and Sensor Networks
- Fundamental Limits and Thermodynamics of Computation
Design Project #1 typically involves optimizing a particular logic block for both power and performance. Example circuits include 32-bit adders, 4x4 array multipliers, or an SRAM data cache critical path. Projects involve logic design, transistor level circuit design, simulation and verification using a Spice-like circuit simulator such as Hspice, and preparation of a written report with an emphasis on design discussion. Design Project #2 Final Project allows students to pursue their own small research projects in various aspects of low power digital integrated circuit design. Examples include modeling power dissipation for routing fabrics, designing low-swing or encoded on-chip interconnects, and exploring low leakage power cache designs. Students are required to perform some circuit or logic design and analysis. Designs are verified through simulation using a Hardware Description Language such as Verilog or circuit simulator such as Hspice. Students give a brief class presentation and submit a final report in a conference paper format.
Most material will be from classic and recent research papers on low power design.
- Roy, K. and Prasad, S., Low Power CMOS VLSI: Circuit Design
- Chandrakasan, A. and Brodersen, R., eds., Low-Power CMOS Design
- Chandrakasan, A. and Brodersen, R., Low Power Digital CMOS Design
- Rabaey, J., Chandrakasan, A., and Nikolic, B., Digital Integrated Circuits: A Design Perspective, 2nd ed.
- Kassakian, J., Schlecht, M., and Verghese, G., Principles of Power Electronics